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Searched refs:pccr0 (Results 1 – 4 of 4) sorted by relevance

/external/u-boot/arch/arm/cpu/arm926ejs/mx27/
Dtimer.c96 writel(readl(&pll->pccr0) | PCCR0_GPT1_EN, &pll->pccr0); in timer_init()
Dgeneric.c185 writel(readl(&pll->pccr0) | PCCR0_FEC_EN, &pll->pccr0); in cpu_eth_init()
/external/u-boot/arch/arm/lib/
Dasm-offsets.c85 DEFINE(PCCR0, IMX_PLL_BASE + offsetof(struct pll_regs, pccr0)); in main()
/external/u-boot/arch/arm/include/asm/arch-mx27/
Dimx-regs.h123 u32 pccr0; /* Peripheral Clock Control Register 0 */ member