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Searched refs:pex_idx (Results 1 – 4 of 4) sorted by relevance

/external/u-boot/arch/arm/mach-mvebu/serdes/a38x/
Dctrl_pex.c22 u32 pex_idx, tmp, next_busno, first_busno, temp_pex_reg, in hws_pex_config() local
43 pex_idx = serdes_type - PEX0; in hws_pex_config()
44 tmp = reg_read(PEX_CAPABILITIES_REG(pex_idx)); in hws_pex_config()
47 reg_write(PEX_CAPABILITIES_REG(pex_idx), tmp); in hws_pex_config()
111 pex_idx = serdes_type - PEX0; in hws_pex_config()
112 tmp = reg_read(PEX_DBG_STATUS_REG(pex_idx)); in hws_pex_config()
117 DEBUG_INIT_D(pex_idx, 1); in hws_pex_config()
124 (pex_idx, PEX_LINK_CAPABILITY_REG))); in hws_pex_config()
130 pex_idx, in hws_pex_config()
140 pex_local_bus_num_set(pex_idx, first_busno); in hws_pex_config()
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Dhigh_speed_env_spec.c1680 u32 sata_idx, pex_idx, sata_port; in serdes_power_up_ctrl() local
1720 pex_idx = serdes_type - PEX0; in serdes_power_up_ctrl()
1732 reg_read(((PEX_IF_REGS_BASE(pex_idx)) + in serdes_power_up_ctrl()
1739 reg_write(((PEX_IF_REGS_BASE(pex_idx)) + 0x6c), in serdes_power_up_ctrl()
1743 reg_read(((PEX_IF_REGS_BASE(pex_idx)) + in serdes_power_up_ctrl()
1747 reg_write(((PEX_IF_REGS_BASE(pex_idx)) + 0x6c), in serdes_power_up_ctrl()
1751 reg_read(((PEX_IF_REGS_BASE(pex_idx)) + in serdes_power_up_ctrl()
1755 reg_write(((PEX_IF_REGS_BASE(pex_idx)) + 0x70), in serdes_power_up_ctrl()
1766 data_arr_idx = pex_idx; in serdes_power_up_ctrl()
/external/u-boot/drivers/pci/
Dpci_mvebu.c106 static void mvebu_get_port_lane(struct mvebu_pcie *pcie, int pex_idx, in mvebu_get_port_lane() argument
114 pcie->port = port[pex_idx]; in mvebu_get_port_lane()
115 pcie->lane = lane[pex_idx]; in mvebu_get_port_lane()
116 *mem_target = target[pex_idx]; in mvebu_get_port_lane()
117 *mem_attr = attr[pex_idx]; in mvebu_get_port_lane()
141 static void mvebu_get_port_lane(struct mvebu_pcie *pcie, int pex_idx, in mvebu_get_port_lane() argument
151 pcie->port = port[pex_idx]; in mvebu_get_port_lane()
152 pcie->lane = lane[pex_idx]; in mvebu_get_port_lane()
153 *mem_target = target[pex_idx]; in mvebu_get_port_lane()
154 *mem_attr = attr[pex_idx]; in mvebu_get_port_lane()
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Dpcie_layerscape.h128 #define LS1021_PEXMSCPORTSR(pex_idx) (0x94 + (pex_idx) * 4) argument