| /external/u-boot/arch/arm/mach-uniphier/dram/ |
| D | umc-pxs2.c | 59 static void ddrphy_fifo_reset(void __iomem *phy_base) in ddrphy_fifo_reset() argument
63 tmp = readl(phy_base + MPHY_PGCR0); in ddrphy_fifo_reset()
65 writel(tmp, phy_base + MPHY_PGCR0); in ddrphy_fifo_reset()
70 writel(tmp, phy_base + MPHY_PGCR0); in ddrphy_fifo_reset()
75 static void ddrphy_vt_ctrl(void __iomem *phy_base, int enable) in ddrphy_vt_ctrl() argument
79 tmp = readl(phy_base + MPHY_PGCR1); in ddrphy_vt_ctrl()
86 writel(tmp, phy_base + MPHY_PGCR1); in ddrphy_vt_ctrl()
89 while (!(readl(phy_base + MPHY_PGSR1) & MPHY_PGSR1_VTSTOP)) in ddrphy_vt_ctrl()
94 static void ddrphy_dqs_delay_fixup(void __iomem *phy_base, int nr_dx, int step) in ddrphy_dqs_delay_fixup() argument
98 void __iomem *dx_base = phy_base + MPHY_DX_BASE; in ddrphy_dqs_delay_fixup()
[all …]
|
| D | ddrphy-ld4.c | 31 int uniphier_ld4_ddrphy_init(void __iomem *phy_base, int freq, bool ddr3plus) in uniphier_ld4_ddrphy_init() argument
48 writel(0x0300c473, phy_base + PHY_PGCR1); in uniphier_ld4_ddrphy_init()
49 writel(ddrphy_ptr0[freq_e], phy_base + PHY_PTR0); in uniphier_ld4_ddrphy_init()
50 writel(ddrphy_ptr1[freq_e], phy_base + PHY_PTR1); in uniphier_ld4_ddrphy_init()
51 writel(0x00083DEF, phy_base + PHY_PTR2); in uniphier_ld4_ddrphy_init()
52 writel(ddrphy_ptr3[freq_e], phy_base + PHY_PTR3); in uniphier_ld4_ddrphy_init()
53 writel(ddrphy_ptr4[freq_e], phy_base + PHY_PTR4); in uniphier_ld4_ddrphy_init()
54 writel(0xF004001A, phy_base + PHY_DSGCR); in uniphier_ld4_ddrphy_init()
57 tmp = readl(phy_base + PHY_DXCCR); in uniphier_ld4_ddrphy_init()
60 writel(tmp, phy_base + PHY_DXCCR); in uniphier_ld4_ddrphy_init()
[all …]
|
| D | cmd_ddrmphy.c | 73 void __iomem *phy_base, *dx_base; in dump_loop() local
77 phy_base = ioremap(param->phy[phy].base, SZ_4K); in dump_loop()
78 dx_base = phy_base + MPHY_DX_BASE; in dump_loop()
87 iounmap(phy_base); in dump_loop()
93 void __iomem *phy_base, *zq_base; in zq_dump() local
101 phy_base = ioremap(param->phy[phy].base, SZ_4K); in zq_dump()
102 zq_base = phy_base + MPHY_ZQ_BASE; in zq_dump()
123 iounmap(phy_base); in zq_dump()
229 { int ofst = MPHY_ ## x; void __iomem *reg = phy_base + ofst; \
236 void __iomem *reg = phy_base + ofst; \
[all …]
|
| D | ddrphy-training.c | 21 void ddrphy_prepare_training(void __iomem *phy_base, int rank) in ddrphy_prepare_training() argument
23 void __iomem *dx_base = phy_base + PHY_DX_BASE; in ddrphy_prepare_training()
37 tmp = readl(phy_base + PHY_DTCR); in ddrphy_prepare_training()
46 writel(tmp, phy_base + PHY_DTCR); in ddrphy_prepare_training()
107 int ddrphy_training(void __iomem *phy_base) in ddrphy_training() argument
123 writel(init_flag, phy_base + PHY_PIR); in ddrphy_training()
131 pgsr0 = readl(phy_base + PHY_PGSR0); in ddrphy_training()
|
| D | cmd_ddrphy.c | 88 void __iomem *phy_base, *dx_base; in dump_loop() local
92 phy_base = ioremap(param->phy[phy].base, SZ_4K); in dump_loop()
93 dx_base = phy_base + PHY_DX_BASE; in dump_loop()
102 iounmap(phy_base); in dump_loop()
203 { int ofst = PHY_ ## x; void __iomem *reg = phy_base + ofst; \
211 void __iomem *reg = phy_base + ofst; \
218 void __iomem *phy_base; in reg_dump() local
224 phy_base = ioremap(param->phy[phy].base, SZ_4K); in reg_dump()
227 phy, ptr_to_uint(phy_base)); in reg_dump()
260 iounmap(phy_base); in reg_dump()
|
| D | ddrphy-init.h | 12 int uniphier_ld4_ddrphy_init(void __iomem *phy_base, int freq, bool ddr3plus);
13 void ddrphy_prepare_training(void __iomem *phy_base, int rank);
14 int ddrphy_training(void __iomem *phy_base);
|
| D | umc-pro4.c | 134 void __iomem *phy_base = dc_base + 0x00001000; in umc_ch_init() local
146 ret = uniphier_ld4_ddrphy_init(phy_base, freq, ddr3plus); in umc_ch_init()
150 ddrphy_prepare_training(phy_base, phy); in umc_ch_init()
151 ret = ddrphy_training(phy_base); in umc_ch_init()
155 phy_base += 0x00001000; in umc_ch_init()
|
| D | umc-ld4.c | 147 void __iomem *phy_base = dc_base + 0x00001000; in umc_ch_init() local
156 ret = uniphier_ld4_ddrphy_init(phy_base, freq, ddr3plus); in umc_ch_init()
160 ddrphy_prepare_training(phy_base, umc_get_rank(ch)); in umc_ch_init()
161 ret = ddrphy_training(phy_base); in umc_ch_init()
|
| D | umc-sld8.c | 150 void __iomem *phy_base = dc_base + 0x00001000; in umc_ch_init() local
159 ret = uniphier_ld4_ddrphy_init(phy_base, freq, ddr3plus); in umc_ch_init()
163 ddrphy_prepare_training(phy_base, umc_get_rank(ch)); in umc_ch_init()
164 ret = ddrphy_training(phy_base); in umc_ch_init()
|
| /external/u-boot/drivers/usb/host/ |
| D | xhci-exynos5.c | 37 fdt_addr_t phy_base; member
80 plat->phy_base = fdtdec_get_addr(blob, node, "reg"); in xhci_usb_ofdata_to_platdata()
81 if (plat->phy_base == FDT_ADDR_T_NONE) { in xhci_usb_ofdata_to_platdata()
212 ctx->usb3_phy = (struct exynos_usb3_phy *)plat->phy_base; in xhci_usb_probe()
|
| D | ehci-exynos.c | 30 fdt_addr_t phy_base; member
71 plat->phy_base = fdtdec_get_addr(blob, node, "reg"); in ehci_usb_ofdata_to_platdata()
72 if (plat->phy_base == FDT_ADDR_T_NONE) { in ehci_usb_ofdata_to_platdata()
220 ctx->usb = (struct exynos_usb_phy *)plat->phy_base; in ehci_usb_probe()
|