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Searched refs:phy_con4 (Results 1 – 5 of 5) sorted by relevance

/external/u-boot/arch/arm/mach-imx/mx7/
Dddr.c80 writel(ddr_phy_regs_val->phy_con4, &ddr_phy_regs->phy_con4); in mx7_dram_cfg()
/external/u-boot/arch/arm/mach-exynos/include/mach/
Ddmc.h334 unsigned int phy_con4; member
381 unsigned int phy_con4; member
/external/u-boot/arch/arm/mach-exynos/
Ddmc_init_ddr3.c80 writel(mem->phy0_dqs, &phy0_ctrl->phy_con4); in ddr3_mem_ctrl_init()
81 writel(mem->phy1_dqs, &phy1_ctrl->phy_con4); in ddr3_mem_ctrl_init()
283 return readl(&phy_ctrl->phy_con4); in dmc_get_read_offset_value()
308 writel(offset, &phy_ctrl->phy_con4); in dmc_set_read_offset_value()
/external/u-boot/arch/arm/include/asm/arch-mx7/
Dmx7-ddr.h124 u32 phy_con4; /* 0x0010 */ member
/external/u-boot/board/compulab/cl-som-imx7/
Dspl.c68 .phy_con4 = 0x00060807,