Searched refs:phy_reg1_val (Results 1 – 4 of 4) sorted by relevance
105 extern u32 phy_reg1_val;
14 u32 phy_reg1_val = 8; variable2033 CTX_PHY_REG(effective_cs), phy_reg1_val)); in ddr3_tip_ddr3_reset_phy_regs()2272 ddr3_tip_adll_regs_bypass(dev_num, phy_reg1_val, 0); in ddr3_tip_ddr3_training_main_flow()
992 (((reg_data & 0x1f) + phy_reg1_val) << 10); in ddr3_tip_dynamic_write_leveling()1092 phy_reg1_val) << 10); in ddr3_tip_dynamic_write_leveling()
1007 *ptr = (u32 *)&phy_reg1_val; in ddr3_tip_access_atr()