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Searched refs:pinsr (Results 1 – 15 of 15) sorted by relevance

/external/swiftshader/third_party/subzero/src/
DIceAssemblerX86Base.h501 void pinsr(Type Ty, XmmRegister dst, GPRRegister src, const Immediate &imm);
502 void pinsr(Type Ty, XmmRegister dst, const Address &src,
DIceInstX86BaseImpl.h2811 &Assembler::pinsr, &Assembler::pinsr}; in emitIAS()
DIceAssemblerX86BaseImpl.h2294 void AssemblerX86Base<TraitsType>::pinsr(Type Ty, XmmRegister dst, in pinsr() function
2313 void AssemblerX86Base<TraitsType>::pinsr(Type Ty, XmmRegister dst, in pinsr() function
/external/swiftshader/third_party/subzero/tests_lit/assembler/x86/
Dopcode_register_encodings.ll171 ; the pinsr{b,d}/pextr{b,d} (SSE4.1).
/external/swiftshader/third_party/subzero/unittest/AssemblerX8664/
DXmmArith.cpp1936 __ pinsr(IceType_i##Size, Encoded_Xmm_##Dst(), Encoded_GPR_##GPR(), \ in TEST_F()
1960 __ pinsr(IceType_i##Size, Encoded_Xmm_##Dst(), dwordAddress(T1), \ in TEST_F()
/external/swiftshader/third_party/subzero/unittest/AssemblerX8632/
DXmmArith.cpp1833 __ pinsr(IceType_i##Size, XmmRegister::Encoded_Reg_##Dst, \ in TEST_F()
1857 __ pinsr(IceType_i##Size, XmmRegister::Encoded_Reg_##Dst, \ in TEST_F()
/external/swiftshader/third_party/LLVM/include/llvm/
DIntrinsics.gen249 x86_mmx_pinsr_w, // llvm.x86.mmx.pinsr.w
776 "llvm.x86.mmx.pinsr.w",
2304 return Intrinsic::x86_mmx_pinsr_w; // "86.mmx.pinsr.w"
6199 case Intrinsic::x86_mmx_pinsr_w: // llvm.x86.mmx.pinsr.w
7526 case Intrinsic::x86_mmx_pinsr_w: // llvm.x86.mmx.pinsr.w
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/X86/
Dmmx-schedule.ll3581 %1 = call x86_mmx @llvm.x86.mmx.pinsr.w(x86_mmx %a0, i32 %a1, i32 0)
3584 %4 = call x86_mmx @llvm.x86.mmx.pinsr.w(x86_mmx %1, i32 %3, i32 1)
3588 declare x86_mmx @llvm.x86.mmx.pinsr.w(x86_mmx, i32, i32) nounwind readnone
/external/swiftshader/third_party/llvm-7.0/configs/common/include/llvm/IR/
DIntrinsicEnums.inc6303 x86_mmx_pinsr_w, // llvm.x86.mmx.pinsr.w
DIntrinsicImpl.inc6329 "llvm.x86.mmx.pinsr.w",
15207 1, // llvm.x86.mmx.pinsr.w
/external/swiftshader/third_party/llvm-subzero/build/Windows/include/llvm/IR/
DIntrinsics.gen5632 x86_mmx_pinsr_w, // llvm.x86.mmx.pinsr.w
11690 "llvm.x86.mmx.pinsr.w",
19630 1, // llvm.x86.mmx.pinsr.w
/external/swiftshader/third_party/llvm-subzero/build/Linux/include/llvm/IR/
DIntrinsics.gen5632 x86_mmx_pinsr_w, // llvm.x86.mmx.pinsr.w
11690 "llvm.x86.mmx.pinsr.w",
19630 1, // llvm.x86.mmx.pinsr.w
/external/swiftshader/third_party/llvm-subzero/build/Fuchsia/include/llvm/IR/
DIntrinsics.gen5632 x86_mmx_pinsr_w, // llvm.x86.mmx.pinsr.w
11690 "llvm.x86.mmx.pinsr.w",
19630 1, // llvm.x86.mmx.pinsr.w
/external/swiftshader/third_party/llvm-subzero/build/MacOS/include/llvm/IR/
DIntrinsics.gen5598 x86_mmx_pinsr_w, // llvm.x86.mmx.pinsr.w
11622 "llvm.x86.mmx.pinsr.w",
19507 1, // llvm.x86.mmx.pinsr.w
/external/swiftshader/third_party/llvm-subzero/build/Android/include/llvm/IR/
DIntrinsics.gen5632 x86_mmx_pinsr_w, // llvm.x86.mmx.pinsr.w
11690 "llvm.x86.mmx.pinsr.w",
19630 1, // llvm.x86.mmx.pinsr.w