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Searched refs:plat (Results 1 – 25 of 275) sorted by relevance

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/external/libunwind/tests/
Dcheck-namespace.sh.in9 plat=@arch@
14 LIBUNWIND_GENERIC=../src/.libs/libunwind-${plat}.so
75 if [ ${plat} = "arm" ]; then
82 if [ ${plat} = "mips" ]; then
91 match _UL${plat}_create_addr_space
92 match _UL${plat}_destroy_addr_space
93 match _UL${plat}_get_fpreg
94 match _UL${plat}_get_proc_info
95 match _UL${plat}_get_proc_info_by_ip
96 match _UL${plat}_get_proc_name
[all …]
/external/u-boot/drivers/serial/
Dserial_lpuart.c98 struct lpuart_serial_platdata *plat = dev->platdata; in is_lpuart32() local
100 return plat->flags & LPUART_FLAG_REGMAP_32BIT_REG; in is_lpuart32()
103 static void _lpuart_serial_setbrg(struct lpuart_serial_platdata *plat, in _lpuart_serial_setbrg() argument
106 struct lpuart_fsl *base = plat->reg; in _lpuart_serial_setbrg()
117 static int _lpuart_serial_getc(struct lpuart_serial_platdata *plat) in _lpuart_serial_getc() argument
119 struct lpuart_fsl *base = plat->reg; in _lpuart_serial_getc()
128 static void _lpuart_serial_putc(struct lpuart_serial_platdata *plat, in _lpuart_serial_putc() argument
131 struct lpuart_fsl *base = plat->reg; in _lpuart_serial_putc()
140 static int _lpuart_serial_tstc(struct lpuart_serial_platdata *plat) in _lpuart_serial_tstc() argument
142 struct lpuart_fsl *base = plat->reg; in _lpuart_serial_tstc()
[all …]
Dserial_rockchip.c17 struct ns16550_platdata plat; member
23 struct ns16550_platdata plat; member
30 struct rockchip_uart_platdata *plat = dev_get_platdata(dev); in rockchip_serial_probe() local
33 plat->plat.base = plat->dtplat.reg[0]; in rockchip_serial_probe()
34 plat->plat.reg_shift = plat->dtplat.reg_shift; in rockchip_serial_probe()
35 plat->plat.clock = plat->dtplat.clock_frequency; in rockchip_serial_probe()
36 plat->plat.fcr = UART_FCR_DEFVAL; in rockchip_serial_probe()
37 dev->platdata = &plat->plat; in rockchip_serial_probe()
Dserial_stm32.c42 struct stm32x7_serial_platdata *plat = dev_get_platdata(dev); in stm32_serial_setbrg() local
44 _stm32_serial_setbrg(plat->base, plat->uart_info, in stm32_serial_setbrg()
45 plat->clock_rate, baudrate); in stm32_serial_setbrg()
52 struct stm32x7_serial_platdata *plat = dev_get_platdata(dev); in stm32_serial_setparity() local
53 bool stm32f4 = plat->uart_info->stm32f4; in stm32_serial_setparity()
54 u8 uart_enable_bit = plat->uart_info->uart_enable_bit; in stm32_serial_setparity()
55 u32 cr1 = plat->base + CR1_OFFSET(stm32f4); in stm32_serial_setparity()
91 struct stm32x7_serial_platdata *plat = dev_get_platdata(dev); in stm32_serial_getc() local
92 bool stm32f4 = plat->uart_info->stm32f4; in stm32_serial_getc()
93 fdt_addr_t base = plat->base; in stm32_serial_getc()
[all …]
Dns16550.c96 struct ns16550_platdata *plat = port->plat; in ns16550_writeb() local
99 offset *= 1 << plat->reg_shift; in ns16550_writeb()
100 addr = (unsigned char *)plat->base + offset; in ns16550_writeb()
106 serial_out_shift(addr + plat->reg_offset, plat->reg_shift, value); in ns16550_writeb()
111 struct ns16550_platdata *plat = port->plat; in ns16550_readb() local
114 offset *= 1 << plat->reg_shift; in ns16550_readb()
115 addr = (unsigned char *)plat->base + offset; in ns16550_readb()
117 return serial_in_shift(addr + plat->reg_offset, plat->reg_shift); in ns16550_readb()
122 struct ns16550_platdata *plat = port->plat; in ns16550_getfcr() local
124 return plat->fcr; in ns16550_getfcr()
[all …]
/external/u-boot/drivers/power/pmic/
Di2c_pmic_emul.c31 struct sandbox_i2c_pmic_plat_data *plat = dev_get_platdata(emul); in sandbox_i2c_pmic_read_data() local
33 if (plat->rw_idx + len > plat->buf_size) { in sandbox_i2c_pmic_read_data()
35 plat->reg_count); in sandbox_i2c_pmic_read_data()
40 (unsigned int)chip & 0xff, plat->rw_reg, plat->rw_idx, len); in sandbox_i2c_pmic_read_data()
42 memcpy(buffer, plat->reg + plat->rw_idx, len); in sandbox_i2c_pmic_read_data()
51 struct sandbox_i2c_pmic_plat_data *plat = dev_get_platdata(emul); in sandbox_i2c_pmic_write_data() local
58 plat->rw_reg = *buffer; in sandbox_i2c_pmic_write_data()
59 plat->rw_idx = plat->rw_reg * plat->trans_len; in sandbox_i2c_pmic_write_data()
62 (unsigned int)chip & 0xff, plat->rw_reg, plat->rw_idx, len); in sandbox_i2c_pmic_write_data()
71 if (plat->rw_idx + len > plat->buf_size) { in sandbox_i2c_pmic_write_data()
[all …]
/external/u-boot/drivers/gpio/
Ddwapb_gpio.c41 struct gpio_dwapb_platdata *plat = dev_get_platdata(dev); in dwapb_gpio_direction_input() local
43 clrbits_le32(plat->base + GPIO_SWPORT_DDR(plat->bank), 1 << pin); in dwapb_gpio_direction_input()
50 struct gpio_dwapb_platdata *plat = dev_get_platdata(dev); in dwapb_gpio_direction_output() local
52 setbits_le32(plat->base + GPIO_SWPORT_DDR(plat->bank), 1 << pin); in dwapb_gpio_direction_output()
55 setbits_le32(plat->base + GPIO_SWPORT_DR(plat->bank), 1 << pin); in dwapb_gpio_direction_output()
57 clrbits_le32(plat->base + GPIO_SWPORT_DR(plat->bank), 1 << pin); in dwapb_gpio_direction_output()
64 struct gpio_dwapb_platdata *plat = dev_get_platdata(dev); in dwapb_gpio_get_value() local
65 return !!(readl(plat->base + GPIO_EXT_PORT(plat->bank)) & (1 << pin)); in dwapb_gpio_get_value()
71 struct gpio_dwapb_platdata *plat = dev_get_platdata(dev); in dwapb_gpio_set_value() local
74 setbits_le32(plat->base + GPIO_SWPORT_DR(plat->bank), 1 << pin); in dwapb_gpio_set_value()
[all …]
Daltera_pio.c30 struct altera_pio_platdata *plat = dev_get_platdata(dev); in altera_pio_direction_input() local
31 struct altera_pio_regs *const regs = plat->regs; in altera_pio_direction_input()
41 struct altera_pio_platdata *plat = dev_get_platdata(dev); in altera_pio_direction_output() local
42 struct altera_pio_regs *const regs = plat->regs; in altera_pio_direction_output()
56 struct altera_pio_platdata *plat = dev_get_platdata(dev); in altera_pio_get_value() local
57 struct altera_pio_regs *const regs = plat->regs; in altera_pio_get_value()
65 struct altera_pio_platdata *plat = dev_get_platdata(dev); in altera_pio_set_value() local
66 struct altera_pio_regs *const regs = plat->regs; in altera_pio_set_value()
79 struct altera_pio_platdata *plat = dev_get_platdata(dev); in altera_pio_probe() local
81 uc_priv->gpio_count = plat->gpio_count; in altera_pio_probe()
[all …]
Dsunxi_gpio.c161 struct sunxi_gpio_platdata *plat = dev_get_platdata(dev); in sunxi_gpio_direction_input() local
163 sunxi_gpio_set_cfgbank(plat->regs, offset, SUNXI_GPIO_INPUT); in sunxi_gpio_direction_input()
171 struct sunxi_gpio_platdata *plat = dev_get_platdata(dev); in sunxi_gpio_direction_output() local
174 sunxi_gpio_set_cfgbank(plat->regs, offset, SUNXI_GPIO_OUTPUT); in sunxi_gpio_direction_output()
175 clrsetbits_le32(&plat->regs->dat, 1 << num, value ? (1 << num) : 0); in sunxi_gpio_direction_output()
182 struct sunxi_gpio_platdata *plat = dev_get_platdata(dev); in sunxi_gpio_get_value() local
186 dat = readl(&plat->regs->dat); in sunxi_gpio_get_value()
195 struct sunxi_gpio_platdata *plat = dev_get_platdata(dev); in sunxi_gpio_set_value() local
198 clrsetbits_le32(&plat->regs->dat, 1 << num, value ? (1 << num) : 0); in sunxi_gpio_set_value()
204 struct sunxi_gpio_platdata *plat = dev_get_platdata(dev); in sunxi_gpio_get_function() local
[all …]
/external/u-boot/drivers/rtc/
Di2c_rtc_emul.c52 struct sandbox_i2c_rtc_plat_data *plat = dev_get_platdata(dev); in sandbox_i2c_rtc_set_offset() local
55 old_offset = plat->offset; in sandbox_i2c_rtc_set_offset()
56 plat->use_system_time = use_system_time; in sandbox_i2c_rtc_set_offset()
58 plat->offset = offset; in sandbox_i2c_rtc_set_offset()
65 struct sandbox_i2c_rtc_plat_data *plat = dev_get_platdata(dev); in sandbox_i2c_rtc_get_set_base_time() local
68 old_base_time = plat->base_time; in sandbox_i2c_rtc_get_set_base_time()
70 plat->base_time = base_time; in sandbox_i2c_rtc_get_set_base_time()
77 struct sandbox_i2c_rtc_plat_data *plat = dev_get_platdata(dev); in reset_time() local
81 plat->base_time = rtc_mktime(&now); in reset_time()
82 plat->offset = 0; in reset_time()
[all …]
/external/u-boot/drivers/usb/host/
Ddwc3-sti-glue.c45 static int sti_dwc3_glue_drd_init(struct sti_dwc3_glue_platdata *plat) in sti_dwc3_glue_drd_init() argument
49 val = readl(plat->syscfg_base + plat->syscfg_offset); in sti_dwc3_glue_drd_init()
53 switch (plat->mode) { in sti_dwc3_glue_drd_init()
73 pr_err("Unsupported mode of operation %d\n", plat->mode); in sti_dwc3_glue_drd_init()
76 writel(val, plat->syscfg_base + plat->syscfg_offset); in sti_dwc3_glue_drd_init()
81 static void sti_dwc3_glue_init(struct sti_dwc3_glue_platdata *plat) in sti_dwc3_glue_init() argument
85 reg = readl(plat->glue_base + CLKRST_CTRL); in sti_dwc3_glue_init()
90 writel(reg, plat->glue_base + CLKRST_CTRL); in sti_dwc3_glue_init()
93 reg = readl(plat->glue_base + USB2_VBUS_MNGMNT_SEL1); in sti_dwc3_glue_init()
99 writel(reg, plat->glue_base + USB2_VBUS_MNGMNT_SEL1); in sti_dwc3_glue_init()
[all …]
Dxhci-dwc3.c115 struct xhci_dwc3_platdata *plat = dev_get_platdata(dev); in xhci_dwc3_setup_phy() local
126 plat->usb_phys = devm_kcalloc(dev, count, sizeof(struct phy), in xhci_dwc3_setup_phy()
128 if (!plat->usb_phys) in xhci_dwc3_setup_phy()
132 ret = generic_phy_get_by_index(dev, i, &plat->usb_phys[i]); in xhci_dwc3_setup_phy()
139 ++plat->num_phys; in xhci_dwc3_setup_phy()
142 for (i = 0; i < plat->num_phys; i++) { in xhci_dwc3_setup_phy()
143 ret = generic_phy_init(&plat->usb_phys[i]); in xhci_dwc3_setup_phy()
151 for (i = 0; i < plat->num_phys; i++) { in xhci_dwc3_setup_phy()
152 ret = generic_phy_power_on(&plat->usb_phys[i]); in xhci_dwc3_setup_phy()
164 generic_phy_power_off(&plat->usb_phys[i]); in xhci_dwc3_setup_phy()
[all …]
/external/u-boot/drivers/spi/
Dcadence_qspi.c24 struct cadence_spi_platdata *plat = bus->platdata; in cadence_spi_write_speed() local
32 plat->tshsl_ns, plat->tsd2d_ns, in cadence_spi_write_speed()
33 plat->tchsh_ns, plat->tslch_ns); in cadence_spi_write_speed()
120 struct cadence_spi_platdata *plat = bus->platdata; in cadence_spi_set_speed() local
124 if (hz > plat->max_hz) in cadence_spi_set_speed()
125 hz = plat->max_hz; in cadence_spi_set_speed()
155 struct cadence_spi_platdata *plat = bus->platdata; in cadence_spi_probe() local
158 priv->regbase = plat->regbase; in cadence_spi_probe()
159 priv->ahbbase = plat->ahbbase; in cadence_spi_probe()
162 cadence_qspi_apb_controller_init(plat); in cadence_spi_probe()
[all …]
Dsoft_spi.c41 struct soft_spi_platdata *plat = dev_get_platdata(bus); in soft_spi_scl() local
43 dm_gpio_set_value(&plat->sclk, bit); in soft_spi_scl()
51 struct soft_spi_platdata *plat = dev_get_platdata(bus); in soft_spi_sda() local
53 dm_gpio_set_value(&plat->mosi, bit); in soft_spi_sda()
61 struct soft_spi_platdata *plat = dev_get_platdata(bus); in soft_spi_cs_activate() local
63 dm_gpio_set_value(&plat->cs, 0); in soft_spi_cs_activate()
64 dm_gpio_set_value(&plat->sclk, 0); in soft_spi_cs_activate()
65 dm_gpio_set_value(&plat->cs, 1); in soft_spi_cs_activate()
73 struct soft_spi_platdata *plat = dev_get_platdata(bus); in soft_spi_cs_deactivate() local
75 dm_gpio_set_value(&plat->cs, 0); in soft_spi_cs_deactivate()
[all …]
Dcadence_qspi_apb.c377 void cadence_qspi_apb_controller_init(struct cadence_spi_platdata *plat) in cadence_qspi_apb_controller_init() argument
381 cadence_qspi_apb_controller_disable(plat->regbase); in cadence_qspi_apb_controller_init()
384 reg = readl(plat->regbase + CQSPI_REG_SIZE); in cadence_qspi_apb_controller_init()
388 reg |= (plat->page_size << CQSPI_REG_SIZE_PAGE_LSB); in cadence_qspi_apb_controller_init()
389 reg |= (plat->block_size << CQSPI_REG_SIZE_BLOCK_LSB); in cadence_qspi_apb_controller_init()
390 writel(reg, plat->regbase + CQSPI_REG_SIZE); in cadence_qspi_apb_controller_init()
393 writel(0, plat->regbase + CQSPI_REG_REMAP); in cadence_qspi_apb_controller_init()
396 writel(plat->fifo_depth / 2, plat->regbase + CQSPI_REG_SRAMPARTITION); in cadence_qspi_apb_controller_init()
399 writel(0, plat->regbase + CQSPI_REG_IRQMASK); in cadence_qspi_apb_controller_init()
401 cadence_qspi_apb_controller_enable(plat->regbase); in cadence_qspi_apb_controller_init()
[all …]
Dzynq_spi.c74 struct zynq_spi_platdata *plat = bus->platdata; in zynq_spi_ofdata_to_platdata() local
78 plat->regs = (struct zynq_spi_regs *)devfdt_get_addr(bus); in zynq_spi_ofdata_to_platdata()
81 plat->frequency = fdtdec_get_int(blob, node, "spi-max-frequency", in zynq_spi_ofdata_to_platdata()
83 plat->deactivate_delay_us = fdtdec_get_int(blob, node, in zynq_spi_ofdata_to_platdata()
85 plat->activate_delay_us = fdtdec_get_int(blob, node, in zynq_spi_ofdata_to_platdata()
87 plat->speed_hz = plat->frequency / 2; in zynq_spi_ofdata_to_platdata()
90 plat->regs, plat->frequency); in zynq_spi_ofdata_to_platdata()
127 struct zynq_spi_platdata *plat = dev_get_platdata(bus); in zynq_spi_probe() local
130 priv->regs = plat->regs; in zynq_spi_probe()
142 struct zynq_spi_platdata *plat = bus->platdata; in spi_cs_activate() local
[all …]
Dbcm63xx_hsspi.c140 struct dm_spi_slave_platdata *plat) in bcm63xx_hsspi_activate_cs() argument
149 writel_be(set, priv->regs + SPI_PFL_CLK_REG(plat->cs)); in bcm63xx_hsspi_activate_cs()
158 if (plat->mode & SPI_CPHA) in bcm63xx_hsspi_activate_cs()
167 clrsetbits_be32(priv->regs + SPI_PFL_SIG_REG(plat->cs), clr, set); in bcm63xx_hsspi_activate_cs()
174 if (priv->cs_pols & BIT(plat->cs)) in bcm63xx_hsspi_activate_cs()
175 clr |= BIT(plat->cs); in bcm63xx_hsspi_activate_cs()
177 set |= BIT(plat->cs); in bcm63xx_hsspi_activate_cs()
180 if (priv->cs_pols & BIT(!plat->cs)) in bcm63xx_hsspi_activate_cs()
181 clr |= BIT(!plat->cs); in bcm63xx_hsspi_activate_cs()
183 set |= BIT(!plat->cs); in bcm63xx_hsspi_activate_cs()
[all …]
/external/u-boot/drivers/video/
Dsandbox_sdl.c24 struct sandbox_sdl_plat *plat = dev_get_platdata(dev); in sandbox_sdl_probe() local
28 ret = sandbox_sdl_init_display(plat->xres, plat->yres, plat->bpix); in sandbox_sdl_probe()
33 uc_priv->xsize = plat->xres; in sandbox_sdl_probe()
34 uc_priv->ysize = plat->yres; in sandbox_sdl_probe()
35 uc_priv->bpix = plat->bpix; in sandbox_sdl_probe()
36 uc_priv->rot = plat->rot; in sandbox_sdl_probe()
37 uc_priv->vidconsole_drv_name = plat->vidconsole_drv_name; in sandbox_sdl_probe()
38 uc_priv->font_size = plat->font_size; in sandbox_sdl_probe()
46 struct sandbox_sdl_plat *plat = dev_get_platdata(dev); in sandbox_sdl_bind() local
51 plat->xres = fdtdec_get_int(blob, node, "xres", LCD_MAX_WIDTH); in sandbox_sdl_bind()
[all …]
Dbroadwell_igd.c355 struct broadwell_igd_plat *plat = dev_get_platdata(dev); in igd_setup_panel() local
360 reg32 = (plat->dp_hotplug[0] & 0x7) << 2; in igd_setup_panel()
361 reg32 |= (plat->dp_hotplug[1] & 0x7) << 10; in igd_setup_panel()
362 reg32 |= (plat->dp_hotplug[2] & 0x7) << 18; in igd_setup_panel()
366 reg32 = (plat->port_select & 0x3) << 30; in igd_setup_panel()
367 reg32 |= (plat->power_up_delay & 0x1fff) << 16; in igd_setup_panel()
368 reg32 |= (plat->power_backlight_on_delay & 0x1fff); in igd_setup_panel()
372 reg32 = (plat->power_down_delay & 0x1fff) << 16; in igd_setup_panel()
373 reg32 |= (plat->power_backlight_off_delay & 0x1fff); in igd_setup_panel()
377 if (plat->power_cycle_delay) { in igd_setup_panel()
[all …]
/external/u-boot/arch/x86/cpu/broadwell/
Dsata.c42 struct sata_platdata *plat = dev_get_platdata(dev); in broadwell_sata_init() local
57 reg16 |= 0x8000 | plat->port_map; in broadwell_sata_init()
75 reg32 |= (plat->port_map ^ 0xf) << 24; in broadwell_sata_init()
76 reg32 |= (plat->devslp_mux & 1) << 15; in broadwell_sata_init()
90 writel(plat->port_map, abar + 0x0c); in broadwell_sata_init()
95 if (plat->devslp_disable) { in broadwell_sata_init()
102 if (!(plat->port_map & (1 << port))) in broadwell_sata_init()
112 if ((plat->port_map & ((1 << 3)|(1 << 2))) == 0) in broadwell_sata_init()
115 if ((plat->port_map & ((1 << 1)|(1 << 0))) == 0) in broadwell_sata_init()
120 if (plat->port0_gen3_tx) in broadwell_sata_init()
[all …]
/external/u-boot/drivers/misc/
Di2c_eeprom_emul.c35 struct sandbox_i2c_flash_plat_data *plat = dev_get_platdata(dev); in sandbox_i2c_eeprom_set_test_mode() local
37 plat->test_mode = mode; in sandbox_i2c_eeprom_set_test_mode()
42 struct sandbox_i2c_flash_plat_data *plat = dev_get_platdata(dev); in sandbox_i2c_eeprom_set_offset_len() local
44 plat->offset_len = offset_len; in sandbox_i2c_eeprom_set_offset_len()
56 struct sandbox_i2c_flash_plat_data *plat = in sandbox_i2c_eeprom_xfer() local
61 if (!plat->size) in sandbox_i2c_eeprom_xfer()
63 if (msg->addr + msg->len > plat->size) { in sandbox_i2c_eeprom_xfer()
65 __func__, msg->addr, msg->len, plat->size); in sandbox_i2c_eeprom_xfer()
73 if (plat->test_mode == SIE_TEST_MODE_SINGLE_BYTE) in sandbox_i2c_eeprom_xfer()
79 } else if (len >= plat->offset_len) { in sandbox_i2c_eeprom_xfer()
[all …]
Dspltest_sandbox.c13 struct dtd_sandbox_spl_test *plat = dev_get_platdata(dev); in sandbox_spl_probe() local
17 printf("bool %d\n", plat->boolval); in sandbox_spl_probe()
19 printf("byte %02x\n", plat->byteval); in sandbox_spl_probe()
21 for (i = 0; i < sizeof(plat->bytearray); i++) in sandbox_spl_probe()
22 printf(" %02x", plat->bytearray[i]); in sandbox_spl_probe()
25 printf("int %d\n", plat->intval); in sandbox_spl_probe()
27 for (i = 0; i < ARRAY_SIZE(plat->intarray); i++) in sandbox_spl_probe()
28 printf(" %d", plat->intarray[i]); in sandbox_spl_probe()
32 for (i = 0; i < sizeof(plat->longbytearray); i++) in sandbox_spl_probe()
33 printf(" %02x", plat->longbytearray[i]); in sandbox_spl_probe()
[all …]
/external/u-boot/drivers/mmc/
Dsdhci-cadence.c86 static int sdhci_cdns_write_phy_reg(struct sdhci_cdns_plat *plat, in sdhci_cdns_write_phy_reg() argument
89 void __iomem *reg = plat->hrs_addr + SDHCI_CDNS_HRS04; in sdhci_cdns_write_phy_reg()
110 static int sdhci_cdns_phy_init(struct sdhci_cdns_plat *plat, in sdhci_cdns_phy_init() argument
122 ret = sdhci_cdns_write_phy_reg(plat, in sdhci_cdns_phy_init()
135 struct sdhci_cdns_plat *plat = dev_get_platdata(mmc->dev); in sdhci_cdns_set_control_reg() local
158 tmp = readl(plat->hrs_addr + SDHCI_CDNS_HRS06); in sdhci_cdns_set_control_reg()
161 writel(tmp, plat->hrs_addr + SDHCI_CDNS_HRS06); in sdhci_cdns_set_control_reg()
168 static int sdhci_cdns_set_tune_val(struct sdhci_cdns_plat *plat, in sdhci_cdns_set_tune_val() argument
171 void __iomem *reg = plat->hrs_addr + SDHCI_CDNS_HRS06; in sdhci_cdns_set_tune_val()
190 struct sdhci_cdns_plat *plat = dev_get_platdata(dev); in sdhci_cdns_execute_tuning() local
[all …]
/external/chromium-trace/catapult/common/py_trace_event/py_trace_event/
Dtrace_time.py45 def InitializeMacNowFunction(plat): argument
52 del plat # Unused
74 def GetClockGetTimeClockNumber(plat): argument
76 if plat.startswith(key):
80 def InitializeLinuxNowFunction(plat): argument
89 clock_monotonic = GetClockGetTimeClockNumber(plat)
142 def InitializeWinNowFunction(plat): argument
167 if plat.startswith(_PLATFORMS['cygwin'])
198 def InitializeNowFunction(plat): argument
204 if plat.startswith(_PLATFORMS['mac']):
[all …]
/external/chromium-trace/catapult/third_party/pyserial/serial/tools/
Dlist_ports_posix.py27 plat = sys.platform.lower() variable
29 if plat[:5] == 'linux': # Linux (confirmed)
32 elif plat == 'cygwin': # cygwin/win32
37 elif plat[:7] == 'openbsd': # OpenBSD
42 elif plat[:3] == 'bsd' or \
43 plat[:7] == 'freebsd':
49 elif plat[:6] == 'darwin': # OS X (confirmed)
52 elif plat[:6] == 'netbsd': # NetBSD
58 elif plat[:4] == 'irix': # IRIX
64 elif plat[:2] == 'hp': # HP-UX (not tested)
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