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Searched refs:pll6_ddr_cfg (Results 1 – 2 of 2) sorted by relevance

/external/u-boot/arch/arm/mach-sunxi/
Dclock_sun9i.c141 &ccm->pll6_ddr_cfg); in clock_set_pll6()
/external/u-boot/arch/arm/include/asm/arch-sunxi/
Dclock_sun9i.h17 u32 pll6_ddr_cfg; /* 0x14 ddr pll configuration */ member