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Searched refs:pll_ctrl (Results 1 – 16 of 16) sorted by relevance

/external/u-boot/drivers/usb/host/
Dehci-vf.c62 void __iomem *pll_ctrl; in usb_power_config() local
66 pll_ctrl = &anadig->pll3_ctrl; in usb_power_config()
67 clrbits_le32(pll_ctrl, ANADIG_PLL3_CTRL_BYPASS); in usb_power_config()
68 setbits_le32(pll_ctrl, ANADIG_PLL3_CTRL_ENABLE in usb_power_config()
73 pll_ctrl = &anadig->pll7_ctrl; in usb_power_config()
74 clrbits_le32(pll_ctrl, ANADIG_PLL7_CTRL_BYPASS); in usb_power_config()
75 setbits_le32(pll_ctrl, ANADIG_PLL7_CTRL_ENABLE in usb_power_config()
/external/kernel-headers/original/uapi/linux/
Drtc.h57 int pll_ctrl; /* placeholder for fancier control */ member
/external/u-boot/arch/m68k/include/asm/
Dimmap_5282.h89 typedef struct pll_ctrl { struct
Dimmap_520x.h176 typedef struct pll_ctrl { struct
Dimmap_5235.h206 typedef struct pll_ctrl { struct
Dimmap_5301x.h296 typedef struct pll_ctrl { struct
Dimmap_5329.h374 typedef struct pll_ctrl { struct
Dimmap_5275.h340 typedef struct pll_ctrl { struct
/external/strace/
Drtc.c84 pll.pll_ctrl, pll.pll_value, pll.pll_max, pll.pll_min, in decode_rtc_pll_info()
/external/strace/tests-mx32/
Dioctl_rtc.c175 pll->pll_ctrl, pll->pll_value, pll->pll_max, pll->pll_min, in main()
/external/strace/tests-m32/
Dioctl_rtc.c175 pll->pll_ctrl, pll->pll_value, pll->pll_max, pll->pll_min, in main()
/external/strace/tests/
Dioctl_rtc.c175 pll->pll_ctrl, pll->pll_value, pll->pll_max, pll->pll_min, in main()
/external/syzkaller/sys/linux/
Drtc.txt52 pll_ctrl int32
/external/u-boot/drivers/video/sunxi/
Dsunxi_display.c222 &hdmi->pll_ctrl); in sunxi_hdmi_edid_get_mode()
770 writel(SUNXI_HDMI_PLL_CTRL, &hdmi->pll_ctrl);
774 clrsetbits_le32(&hdmi->pll_ctrl, SUNXI_HDMI_PLL_CTRL_DIV_MASK,
/external/u-boot/arch/arm/include/asm/arch-sunxi/
Ddisplay.h178 u32 pll_ctrl; /* 0x208 */ member
/external/u-boot/arch/arm/dts/
Ddra7.dtsi1386 <0x4A096800 0x40>; /* pll_ctrl */
1387 reg-names = "phy_rx", "phy_tx", "pll_ctrl";
1494 reg-names = "phy_rx", "phy_tx", "pll_ctrl";