Searched refs:pll_num (Results 1 – 4 of 4) sorted by relevance
| /external/u-boot/arch/powerpc/cpu/mpc85xx/ |
| D | fsl_corenet2_serdes.c | 205 u32 pll_num, pll_status, bc, dc, fc, pll_cr_upd, pll_cr0, pll_cr1; in serdes_init() local
230 for (pll_num = 0; pll_num < SRDS_MAX_BANK; pll_num++) { in serdes_init()
231 pll_status = in_be32(&srds_regs->bank[pll_num].pllcr0); in serdes_init()
233 pll_num, pll_status); in serdes_init()
266 pll_cr1 = in_be32(&srds_regs->bank[pll_num].pllcr1); in serdes_init()
269 out_be32(&srds_regs->bank[pll_num].pllcr1, in serdes_init()
272 pll_num, (pll_cr_upd | pll_cr1)); in serdes_init()
275 pll_cr0 = in_be32(&srds_regs->bank[pll_num].pllcr0); in serdes_init()
276 out_be32(&srds_regs->bank[pll_num].pllcr0, in serdes_init()
279 pll_num, (pll_cr0 | (dc << CR0_DCBIAS_SHIFT))); in serdes_init()
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| /external/u-boot/board/freescale/b4860qds/ |
| D | b4860qds.c | 596 static int calibrate_pll(serdes_corenet_t *srds_regs, int pll_num) in calibrate_pll() argument
603 debug("CALIBRATE PLL:%d\n", pll_num); in calibrate_pll()
604 clrbits_be32(&srds_regs->bank[pll_num].rstctl, in calibrate_pll()
607 clrbits_be32(&srds_regs->bank[pll_num].rstctl, in calibrate_pll()
610 setbits_be32(&srds_regs->bank[pll_num].rstctl, in calibrate_pll()
612 setbits_be32(&srds_regs->bank[pll_num].rstctl, in calibrate_pll()
619 rst_err = in_be32(&srds_regs->bank[pll_num].rstctl) & in calibrate_pll()
622 debug("RST_ERR value for PLL %d is: 0x%x:\n", pll_num, rst_err); in calibrate_pll()
629 static int check_pll_locks(serdes_corenet_t *srds_regs, int pll_num) in check_pll_locks() argument
634 if (calibrate_pll(srds_regs, pll_num)) { in check_pll_locks()
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| /external/u-boot/arch/arm/mach-imx/mx6/ |
| D | clock.c | 213 u32 div, test_div, pll_num, pll_denom; in decode_pll() local
243 pll_num = __raw_readl(&imx_ccm->analog_pll_audio_num); in decode_pll()
254 return infreq * (div + pll_num / pll_denom) / test_div; in decode_pll()
262 pll_num = __raw_readl(&imx_ccm->analog_pll_video_num); in decode_pll()
273 return infreq * (div + pll_num / pll_denom) / test_div; in decode_pll()
551 static int enable_pll_video(u32 pll_div, u32 pll_num, u32 pll_denom, in enable_pll_video() argument
558 pll_div, pll_num, pll_denom); in enable_pll_video()
589 writel(BF_ANADIG_PLL_VIDEO_NUM_A(pll_num), in enable_pll_video()
626 u32 pll_div, pll_num, pll_denom, post_div = 1; in mxs_set_lcdclk() local
699 pll_num = (best - hck * pll_div) * pll_denom / hck; in mxs_set_lcdclk()
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| /external/u-boot/arch/arm/mach-imx/mx7/ |
| D | clock.c | 775 static int enable_pll_video(u32 pll_div, u32 pll_num, u32 pll_denom, in enable_pll_video() argument
782 pll_div, pll_num, pll_denom); in enable_pll_video()
828 writel(CCM_ANALOG_PLL_VIDEO_NUM_A(pll_num), in enable_pll_video()
898 u32 pll_div, pll_num, pll_denom, post_div = 0; in mxs_set_lcdclk() local
944 pll_num = (best - hck * pll_div) * pll_denom / hck; in mxs_set_lcdclk()
946 if (enable_pll_video(pll_div, pll_num, pll_denom, post_div)) in mxs_set_lcdclk()
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