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Searched refs:pllcr1 (Results 1 – 7 of 7) sorted by relevance

/external/u-boot/board/freescale/b4860qds/
Db4860qds.c632 u32 fcap, dcbias, bcap, pllcr1, pllcr0; in check_pll_locks() local
657 clrbits_be32(&srds_regs->bank[pll_num].pllcr1, in check_pll_locks()
659 setbits_be32(&srds_regs->bank[pll_num].pllcr1, in check_pll_locks()
682 setbits_be32(&srds_regs->bank[pll_num].pllcr1, in check_pll_locks()
684 clrbits_be32(&srds_regs->bank[pll_num].pllcr1, in check_pll_locks()
686 setbits_be32(&srds_regs->bank[pll_num].pllcr1, in check_pll_locks()
690 clrbits_be32(&srds_regs->bank[pll_num].pllcr1, in check_pll_locks()
692 pllcr1 = (in_be32 in check_pll_locks()
693 (&srds_regs->bank[pll_num].pllcr1)| in check_pll_locks()
695 out_be32(&srds_regs->bank[pll_num].pllcr1, in check_pll_locks()
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/external/u-boot/arch/powerpc/cpu/mpc85xx/
Dfsl_corenet2_serdes.c266 pll_cr1 = in_be32(&srds_regs->bank[pll_num].pllcr1); in serdes_init()
269 out_be32(&srds_regs->bank[pll_num].pllcr1, in serdes_init()
283 pll_cr1 = in_be32(&srds_regs->bank[pll_num].pllcr1); in serdes_init()
285 out_be32(&srds_regs->bank[pll_num].pllcr1, in serdes_init()
Dfsl_corenet_serdes.c371 setbits_be32(&regs->bank[FSL_SRDS_BANK_3].pllcr1, in p4080_erratum_serdes8()
429 clrbits_be32(&regs->bank[FSL_SRDS_BANK_1].pllcr1, in p4080_erratum_serdes_a005()
437 clrbits_be32(&regs->bank[FSL_SRDS_BANK_1].pllcr1, in p4080_erratum_serdes_a005()
439 setbits_be32(&regs->bank[FSL_SRDS_BANK_3].pllcr1, in p4080_erratum_serdes_a005()
452 clrbits_be32(&regs->bank[bank].pllcr1, in p4080_erratum_serdes_a005()
/external/u-boot/arch/arm/include/asm/arch-fsl-layerscape/
Dimmap_lsch3.h398 u32 pllcr1; /* PLL Control Register 1 */ member
Dimmap_lsch2.h567 u32 pllcr1; /* PLL Control Register 1 */ member
/external/u-boot/arch/arm/include/asm/arch-ls102xa/
Dimmap_ls102xa.h345 u32 pllcr1; /* PLL Control Register 1 */ member
/external/u-boot/arch/powerpc/include/asm/
Dimmap_85xx.h2564 u32 pllcr1; /* PLL Control Register 1 */ member
2637 u32 pllcr1; /* PLL Control Register 1 */ member