Home
last modified time | relevance | path

Searched refs:pllm (Results 1 – 8 of 8) sorted by relevance

/external/u-boot/arch/arm/mach-davinci/
Dcpu.c57 int pllm; in clk_get() local
80 pllm = readl(pll_base + PLLC_PLLM) + 1; in clk_get()
83 pll_out *= pllm; in clk_get()
Ddm365_lowlevel.c56 writel(pllmult, &dv_pll0_regs->pllm); in dm365_pll1_init()
102 int dm365_pll2_init(unsigned long pllm, unsigned long prediv) in dm365_pll2_init() argument
138 writel(pllm, &dv_pll1_regs->pllm); in dm365_pll2_init()
Dda850_lowlevel.c89 writel(pllmult, &reg->pllm); in da850_pll_init()
/external/u-boot/arch/arm/mach-keystone/
Dclock.c62 u32 pllm, plld, bwadj; in configure_mult_div() local
64 pllm = data->pll_m - 1; in configure_mult_div()
69 pllctl_reg_write(data->pll, mult, pllm & PLLM_MULT_LO_MASK); in configure_mult_div()
73 pllm << CFG_PLLCTL0_PLLM_SHIFT); in configure_mult_div()
/external/u-boot/drivers/clk/
Dclk_stm32f.c278 u16 pllm, pllsain; in stm32_clk_get_pllsai_vco_rate() local
280 pllm = (readl(&regs->pllcfgr) & RCC_PLLCFGR_PLLM_MASK); in stm32_clk_get_pllsai_vco_rate()
284 return ((priv->hse_rate / pllm) * pllsain); in stm32_clk_get_pllsai_vco_rate()
401 u16 pllm, plln, pllp, pllq; in stm32_clk_get_rate() local
405 pllm = (readl(&regs->pllcfgr) & RCC_PLLCFGR_PLLM_MASK); in stm32_clk_get_rate()
412 vco = (priv->hse_rate / pllm) * plln; in stm32_clk_get_rate()
/external/u-boot/arch/arm/mach-davinci/include/mach/
Ddm365_lowlevel.h17 int dm365_pll2_init(unsigned long pllm, unsigned long prediv);
Dpll_defs.h18 unsigned int pllm; /* 0x110 */ member
Dhardware.h400 dv_reg pllm; member