| /external/llvm/lib/Target/AArch64/InstPrinter/ |
| D | AArch64InstPrinter.h | 56 void printPostIncOperand(const MCInst *MI, unsigned OpNo, unsigned Imm,
59 void printPostIncOperand(const MCInst *MI, unsigned OpNo, in printPostIncOperand() function
61 printPostIncOperand(MI, OpNo, Amount, O); in printPostIncOperand()
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| D | AArch64InstPrinter.cpp | 1000 void AArch64InstPrinter::printPostIncOperand(const MCInst *MI, unsigned OpNo, in printPostIncOperand() function in AArch64InstPrinter
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| /external/llvm/lib/Target/AArch64/ |
| D | AArch64RegisterInfo.td | 191 def GPR64pi1 : RegisterOperand<GPR64, "printPostIncOperand<1>">;
192 def GPR64pi2 : RegisterOperand<GPR64, "printPostIncOperand<2>">;
193 def GPR64pi3 : RegisterOperand<GPR64, "printPostIncOperand<3>">;
194 def GPR64pi4 : RegisterOperand<GPR64, "printPostIncOperand<4>">;
195 def GPR64pi6 : RegisterOperand<GPR64, "printPostIncOperand<6>">;
196 def GPR64pi8 : RegisterOperand<GPR64, "printPostIncOperand<8>">;
197 def GPR64pi12 : RegisterOperand<GPR64, "printPostIncOperand<12>">;
198 def GPR64pi16 : RegisterOperand<GPR64, "printPostIncOperand<16>">;
199 def GPR64pi24 : RegisterOperand<GPR64, "printPostIncOperand<24>">;
200 def GPR64pi32 : RegisterOperand<GPR64, "printPostIncOperand<32>">;
[all …]
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/InstPrinter/ |
| D | AArch64InstPrinter.h | 61 void printPostIncOperand(const MCInst *MI, unsigned OpNo, unsigned Imm,
64 void printPostIncOperand(const MCInst *MI, unsigned OpNo, in printPostIncOperand() function
66 printPostIncOperand(MI, OpNo, Amount, O); in printPostIncOperand()
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| D | AArch64InstPrinter.cpp | 865 void AArch64InstPrinter::printPostIncOperand(const MCInst *MI, unsigned OpNo, in printPostIncOperand() function in AArch64InstPrinter
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/ |
| D | AArch64RegisterInfo.td | 210 def GPR64pi1 : RegisterOperand<GPR64, "printPostIncOperand<1>">;
211 def GPR64pi2 : RegisterOperand<GPR64, "printPostIncOperand<2>">;
212 def GPR64pi3 : RegisterOperand<GPR64, "printPostIncOperand<3>">;
213 def GPR64pi4 : RegisterOperand<GPR64, "printPostIncOperand<4>">;
214 def GPR64pi6 : RegisterOperand<GPR64, "printPostIncOperand<6>">;
215 def GPR64pi8 : RegisterOperand<GPR64, "printPostIncOperand<8>">;
216 def GPR64pi12 : RegisterOperand<GPR64, "printPostIncOperand<12>">;
217 def GPR64pi16 : RegisterOperand<GPR64, "printPostIncOperand<16>">;
218 def GPR64pi24 : RegisterOperand<GPR64, "printPostIncOperand<24>">;
219 def GPR64pi32 : RegisterOperand<GPR64, "printPostIncOperand<32>">;
[all …]
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| /external/capstone/arch/AArch64/ |
| D | AArch64InstPrinter.c | 639 static void printPostIncOperand(MCInst *MI, unsigned OpNo, in printPostIncOperand() function
667 printPostIncOperand(MI, OpNo, Amount, O); in printPostIncOperand2()
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| /external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/AArch64/ |
| D | AArch64GenAsmWriter.inc | 10348 printPostIncOperand<64>(MI, 3, STI, O);
10353 printPostIncOperand<32>(MI, 3, STI, O);
10358 printPostIncOperand<16>(MI, 3, STI, O);
10363 printPostIncOperand<8>(MI, 3, STI, O);
10368 printPostIncOperand<1>(MI, 3, STI, O);
10373 printPostIncOperand<4>(MI, 3, STI, O);
10378 printPostIncOperand<2>(MI, 3, STI, O);
10383 printPostIncOperand<48>(MI, 3, STI, O);
10388 printPostIncOperand<24>(MI, 3, STI, O);
10398 printPostIncOperand<2>(MI, 5, STI, O);
[all …]
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| D | AArch64GenAsmWriter1.inc | 11280 printPostIncOperand<64>(MI, 3, STI, O);
11285 printPostIncOperand<32>(MI, 3, STI, O);
11290 printPostIncOperand<16>(MI, 3, STI, O);
11295 printPostIncOperand<8>(MI, 3, STI, O);
11300 printPostIncOperand<1>(MI, 3, STI, O);
11305 printPostIncOperand<4>(MI, 3, STI, O);
11310 printPostIncOperand<2>(MI, 3, STI, O);
11315 printPostIncOperand<48>(MI, 3, STI, O);
11320 printPostIncOperand<24>(MI, 3, STI, O);
11330 printPostIncOperand<2>(MI, 5, STI, O);
[all …]
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