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Searched refs:ps_input_cntl (Results 1 – 4 of 4) sorted by relevance

/external/mesa3d/src/amd/vulkan/
Dradv_pipeline.c1617 uint32_t ps_input_cntl; in offset_to_ps_input() local
1619 ps_input_cntl = S_028644_OFFSET(offset); in offset_to_ps_input()
1621 ps_input_cntl |= S_028644_FLAT_SHADE(1); in offset_to_ps_input()
1627 ps_input_cntl = S_028644_OFFSET(0x20) | in offset_to_ps_input()
1630 return ps_input_cntl; in offset_to_ps_input()
1645 pipeline->graphics.ps_input_cntl[ps_offset] = offset_to_ps_input(vs_offset, true); in calculate_ps_inputs()
1653 pipeline->graphics.ps_input_cntl[ps_offset] = offset_to_ps_input(vs_offset, true); in calculate_ps_inputs()
1655 …pipeline->graphics.ps_input_cntl[ps_offset] = offset_to_ps_input(AC_EXP_PARAM_DEFAULT_VAL_0000, tr… in calculate_ps_inputs()
1662 pipeline->graphics.ps_input_cntl[ps_offset] = val; in calculate_ps_inputs()
1674 pipeline->graphics.ps_input_cntl[ps_offset] = S_028644_OFFSET(0x20); in calculate_ps_inputs()
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Dradv_private.h1258 uint32_t ps_input_cntl[32]; member
Dradv_cmd_buffer.c1036 radeon_emit(cmd_buffer->cs, pipeline->graphics.ps_input_cntl[i]); in radv_emit_fragment_shader()
/external/mesa3d/src/gallium/drivers/radeonsi/
Dsi_state_shaders.c2543 unsigned j, offset, ps_input_cntl = 0; in si_get_ps_input_cntl() local
2547 ps_input_cntl |= S_028644_FLAT_SHADE(1); in si_get_ps_input_cntl()
2552 ps_input_cntl |= S_028644_PT_SPRITE_TEX(1); in si_get_ps_input_cntl()
2562 ps_input_cntl |= S_028644_OFFSET(offset); in si_get_ps_input_cntl()
2563 } else if (!G_028644_PT_SPRITE_TEX(ps_input_cntl)) { in si_get_ps_input_cntl()
2574 ps_input_cntl = S_028644_OFFSET(0x20) | in si_get_ps_input_cntl()
2583 ps_input_cntl |= S_028644_OFFSET(vs->info.vs_output_param_offset[vsinfo->num_outputs]); in si_get_ps_input_cntl()
2584 else if (j == vsinfo->num_outputs && !G_028644_PT_SPRITE_TEX(ps_input_cntl)) { in si_get_ps_input_cntl()
2588 ps_input_cntl = S_028644_OFFSET(0x20); in si_get_ps_input_cntl()
2591 ps_input_cntl |= S_028644_DEFAULT_VAL(3); in si_get_ps_input_cntl()
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