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Searched refs:pup_num (Results 1 – 5 of 5) sorted by relevance

/external/u-boot/drivers/ddr/marvell/axp/
Dddr3_write_leveling.c186 u32 cs, cnt, pup_num, sum, phase, delay, max_pup_num, pup, sdram_offset; in ddr3_wl_supplement() local
294 pup_num = (ecc) ? ECC_PUP : pup; in ddr3_wl_supplement()
308 DEBUG_WL_D((u32) pup_num, 1); in ddr3_wl_supplement()
339 [pup_num] in ddr3_wl_supplement()
346 [pup_num][P] + in ddr3_wl_supplement()
350 [pup_num] in ddr3_wl_supplement()
354 [cs][pup_num] in ddr3_wl_supplement()
366 [cs][pup_num] in ddr3_wl_supplement()
370 [cs][pup_num] in ddr3_wl_supplement()
383 [pup_num] in ddr3_wl_supplement()
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Dddr3_dqs.c1264 u32 pup, pup_num; in ddr3_set_dqs_centralization_results() local
1287 pup_num = pup * (1 - ecc) + ecc * ECC_PUP; in ddr3_set_dqs_centralization_results()
1289 DEBUG_DQS_RESULTS_D(pup_num, 1); in ddr3_set_dqs_centralization_results()
1312 ddr3_write_pup_reg(PUP_DQS_WR, cs, pup_num, 0, in ddr3_set_dqs_centralization_results()
1314 dram_info->wl_val[cs][pup_num][D]); in ddr3_set_dqs_centralization_results()
1316 ddr3_write_pup_reg(PUP_DQS_RD, cs, pup_num, 0, in ddr3_set_dqs_centralization_results()
Dddr3_read_leveling.c181 u32 reg, cs, ecc, pup_num, phase, delay, pup; in ddr3_read_leveling_sw() local
287 pup_num = (pup == dram_info->num_of_std_pups) ? ECC_BIT : pup; in ddr3_read_leveling_sw()
292 ddr3_write_pup_reg(PUP_RL_MODE, cs, pup_num, phase, in ddr3_read_leveling_sw()
/external/u-boot/drivers/ddr/marvell/a38x/
Dddr3_training_ip_engine.c337 u32 pup_num, enum hws_training_result result_type, in ddr3_tip_ip_training() argument
358 if (pup_num >= octets_per_if_num) { in ddr3_tip_ip_training()
360 ("pup_num %d not valid\n", pup_num)); in ddr3_tip_ip_training()
423 reg_data |= pup_num << 14; in ddr3_tip_ip_training()
692 u32 pup_num, u32 bit_num, in ddr3_tip_read_training_result() argument
724 result_type, direction, search, pup_num, in ddr3_tip_read_training_result()
732 if (pup_num >= octets_per_if_num) { in ddr3_tip_read_training_result()
734 ("pup_num %d not valid\n", pup_num)); in ddr3_tip_read_training_result()
745 start_pup = pup_num; in ddr3_tip_read_training_result()
746 end_pup = pup_num; in ddr3_tip_read_training_result()
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Dddr3_training_ip_engine.h43 u32 pup_num, u32 bit_num,
54 u32 pup_num, enum hws_training_result result_type,
65 u32 pup_num,