| /external/u-boot/board/samsung/trats/ |
| D | trats.c | 57 struct exynos4_power *pwr = in trats_low_power_mode() local
62 writel(0x0, &pwr->arm_core1_configuration); in trats_low_power_mode()
94 writel(0x0, &pwr->xxti_configuration); /* XXTI */ in trats_low_power_mode()
95 writel(0x0, &pwr->cam_configuration); /* CAM */ in trats_low_power_mode()
96 writel(0x0, &pwr->tv_configuration); /* TV */ in trats_low_power_mode()
97 writel(0x0, &pwr->mfc_configuration); /* MFC */ in trats_low_power_mode()
98 writel(0x0, &pwr->g3d_configuration); /* G3D */ in trats_low_power_mode()
99 writel(0x0, &pwr->gps_configuration); /* GPS */ in trats_low_power_mode()
100 writel(0x0, &pwr->gps_alive_configuration); /* GPS_ALIVE */ in trats_low_power_mode()
364 struct exynos4_power *pwr = in board_power_init() local
[all …]
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| /external/u-boot/drivers/usb/phy/ |
| D | twl4030.c | 105 u8 pwr, clk; in twl4030_phy_power() local
108 pwr = twl4030_usb_read(TWL4030_USB_PHY_PWR_CTRL); in twl4030_phy_power()
109 pwr &= ~PHYPWD; in twl4030_phy_power()
110 twl4030_usb_write(TWL4030_USB_PHY_PWR_CTRL, pwr); in twl4030_phy_power()
126 u8 clk, sts, pwr; in twl4030_usb_ulpi_init() local
159 pwr = twl4030_usb_read(TWL4030_USB_POWER_CTRL); in twl4030_usb_ulpi_init()
160 pwr |= OTG_ENAB; in twl4030_usb_ulpi_init()
161 twl4030_usb_write(TWL4030_USB_POWER_CTRL_SET, pwr); in twl4030_usb_ulpi_init()
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| /external/u-boot/drivers/usb/host/ |
| D | ohci-ep93xx.c | 17 unsigned long pwr = readl(&syscon->pwrcnt); in usb_cpu_init() local
18 writel(pwr | SYSCON_PWRCNT_USH_EN, &syscon->pwrcnt); in usb_cpu_init()
26 unsigned long pwr = readl(&syscon->pwrcnt); in usb_cpu_stop() local
27 writel(pwr & ~SYSCON_PWRCNT_USH_EN, &syscon->pwrcnt); in usb_cpu_stop()
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| /external/u-boot/drivers/mmc/ |
| D | tegra_mmc.c | 37 u8 pwr = 0; in tegra_mmc_set_power() local
43 pwr = TEGRA_MMC_PWRCTL_SD_BUS_VOLTAGE_V1_8; in tegra_mmc_set_power()
47 pwr = TEGRA_MMC_PWRCTL_SD_BUS_VOLTAGE_V3_0; in tegra_mmc_set_power()
51 pwr = TEGRA_MMC_PWRCTL_SD_BUS_VOLTAGE_V3_3; in tegra_mmc_set_power()
55 debug("%s: pwr = %X\n", __func__, pwr); in tegra_mmc_set_power()
58 writeb(pwr, &priv->reg->pwrcon); in tegra_mmc_set_power()
59 if (pwr == 0) in tegra_mmc_set_power()
63 pwr |= TEGRA_MMC_PWRCTL_SD_BUS_POWER; in tegra_mmc_set_power()
64 writeb(pwr, &priv->reg->pwrcon); in tegra_mmc_set_power()
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| D | sdhci.c | 425 u8 pwr = 0; local
430 pwr = SDHCI_POWER_180;
434 pwr = SDHCI_POWER_300;
438 pwr = SDHCI_POWER_330;
443 if (pwr == 0) {
448 pwr |= SDHCI_POWER_ON;
450 sdhci_writeb(host, pwr, SDHCI_POWER_CONTROL);
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| /external/u-boot/board/freescale/common/ |
| D | pixis.h | 23 u8 pwr; member
55 u8 pwr; member
111 u8 pwr; member
141 u8 pwr; member
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| /external/u-boot/arch/arm/dts/ |
| D | stm32mp157.dtsi | 126 pwr: pwr@50001000 { label
127 compatible = "st,stm32mp1-pwr", "st,stm32-pwr", "syscon", "simple-mfd";
135 pwr-regulators@c {
136 compatible = "st,stm32mp1,pwr-reg";
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| D | stih410-pinctrl.dtsi | 19 usb-pwr-enable = <&pio35 1 ALT1 OUT>;
28 usb-pwr-enable = <&pio35 3 ALT1 OUT>;
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| D | sun50i-h5-orangepi-zero-plus.dts | 39 pwr {
40 label = "orangepi:green:pwr";
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| D | armada-xp-synology-ds414.dts | 273 sata1_pwr_pin: sata1-pwr-pin {
278 sata2_pwr_pin: sata2-pwr-pin {
283 sata3_pwr_pin: sata3-pwr-pin {
288 sata4_pwr_pin: sata4-pwr-pin {
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| D | kirkwood-synology.dtsi | 83 pmx_hdd1_pwr_29: pmx-hdd1-pwr-29 {
88 pmx_hdd1_pwr_30: pmx-hdd-pwr-30 {
93 pmx_hdd2_pwr_31: pmx-hdd2-pwr-31 {
113 pmx_hdd2_pwr_34: pmx-hdd2-pwr-34 {
173 pmx_hdd3_pwr_44: pmx-hdd3-pwr-44 {
178 pmx_hdd4_pwr_45: pmx-hdd4-pwr-45 {
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| D | armada-388-gp.dts | 310 reg_sata0: pwr-sata0 {
336 reg_sata1: pwr-sata1 {
364 reg_sata2: pwr-sata2 {
390 reg_sata3: pwr-sata3 {
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| D | sun8i-h3-nanopi-neo-air.dts | 65 pwr {
66 label = "nanopi:green:pwr";
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| D | rk3288-evb.dtsi | 337 pwr_hold: pwr-hold {
349 pwr_key: pwr-key {
355 sdmmc_pwr: sdmmc-pwr {
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| D | bcm2836-rpi-2-b.dts | 20 pwr {
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| D | sun8i-h3-nanopi.dtsi | 71 pwr {
72 label = "nanopi:green:pwr";
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| D | rk3288-tinker.dtsi | 77 pwr-led {
488 eth_phy_pwr: eth-phy-pwr {
519 sdmmc_pwr: sdmmc-pwr {
529 pwr_3g: pwr-3g {
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| D | rk3288-firefly.dtsi | 326 pwr_hold: pwr-hold {
352 pwr_key: pwr-key {
368 sdmmc_pwr: sdmmc-pwr {
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| D | tegra20-paz00.dts | 470 nvidia,cpu-pwr-good-time = <2000>;
471 nvidia,cpu-pwr-off-time = <0>;
472 nvidia,core-pwr-good-time = <3845 3845>;
473 nvidia,core-pwr-off-time = <0>;
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| D | tegra124-nyan.dtsi | 355 nvidia,cpu-pwr-good-time = <500>;
356 nvidia,cpu-pwr-off-time = <300>;
357 nvidia,core-pwr-good-time = <641 3845>;
358 nvidia,core-pwr-off-time = <61036>;
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| D | tegra20-ventana.dts | 544 nvidia,cpu-pwr-good-time = <2000>;
545 nvidia,cpu-pwr-off-time = <100>;
546 nvidia,core-pwr-good-time = <3845 3845>;
547 nvidia,core-pwr-off-time = <458>;
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| D | bcm2835-rpi-b-plus.dts | 16 pwr {
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| /external/u-boot/board/samsung/trats2/ |
| D | trats2.c | 109 struct exynos4_power *pwr = in exynos_init() local
122 writel(0, &pwr->inform4); in exynos_init()
123 writel(0, &pwr->inform5); in exynos_init()
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| /external/u-boot/drivers/clk/ |
| D | clk_stm32f.c | 148 struct stm32_pwr_regs *pwr = priv->pwr_regs; in configure_clocks() local
237 setbits_le32(&pwr->cr1, PWR_CR1_ODEN); in configure_clocks()
239 while (!(readl(&pwr->csr1) & PWR_CSR1_ODRDY)) in configure_clocks()
242 setbits_le32(&pwr->cr1, PWR_CR1_ODSWEN); in configure_clocks()
244 while (!(readl(&pwr->csr1) & PWR_CSR1_ODSWRDY)) in configure_clocks()
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| /external/u-boot/doc/device-tree-bindings/mailbox/ |
| D | mailbox.txt | 30 mbox-names = "pwr-ctrl", "rpc";
|