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Searched refs:q16 (Results 1 – 18 of 18) sorted by relevance

/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/AArch64/
Darm64-spill-remarks-treshold-hotness.ll21 …,~{q5},~{q6},~{q7},~{q8},~{q9},~{q10},~{q11},~{q12},~{q13},~{q14},~{q15},~{q16},~{q17},~{q18},~{q1…
27 …,~{q5},~{q6},~{q7},~{q8},~{q9},~{q10},~{q11},~{q12},~{q13},~{q14},~{q15},~{q16},~{q17},~{q18},~{q1…
37 …,~{q5},~{q6},~{q7},~{q8},~{q9},~{q10},~{q11},~{q12},~{q13},~{q14},~{q15},~{q16},~{q17},~{q18},~{q1…
Darm64-spill-remarks.ll103 …,~{q5},~{q6},~{q7},~{q8},~{q9},~{q10},~{q11},~{q12},~{q13},~{q14},~{q15},~{q16},~{q17},~{q18},~{q1…
109 …,~{q5},~{q6},~{q7},~{q8},~{q9},~{q10},~{q11},~{q12},~{q13},~{q14},~{q15},~{q16},~{q17},~{q18},~{q1…
119 …,~{q5},~{q6},~{q7},~{q8},~{q9},~{q10},~{q11},~{q12},~{q13},~{q14},~{q15},~{q16},~{q17},~{q18},~{q1…
Darm64-spill.ll12 …,~{q5},~{q6},~{q7},~{q8},~{q9},~{q10},~{q11},~{q12},~{q13},~{q14},~{q15},~{q16},~{q17},~{q18},~{q1…
/external/vixl/test/aarch64/
Dtest-assembler-aarch64.cc3718 ASSERT_EQUAL_128(0, 0x14131211, q16); in TEST()
3770 ASSERT_EQUAL_128(0, 0x0a09080706050403, q16); in TEST()
3833 ASSERT_EQUAL_128(0, 0x0a09080706050403, q16); in TEST()
3886 ASSERT_EQUAL_128(0x1211100f0e0d0c0b, 0x0a09080706050403, q16); in TEST()
3938 ASSERT_EQUAL_128(0x1211100f0e0d0c0b, 0x0a09080706050403, q16); in TEST()
4083 ASSERT_EQUAL_128(0, 0x0e0d0c0b06050403, q16); in TEST()
4128 ASSERT_EQUAL_128(0x1e1d1c1b16151413, 0x0e0d0c0b06050403, q16); in TEST()
4168 ASSERT_EQUAL_128(0x1e1d1c1b16151413, 0x0e0d0c0b06050403, q16); in TEST()
4682 __ Ldr(q16, MemOperand(x5, 16, PostIndex)); in TEST()
4716 ASSERT_EQUAL_128(0x1f1e1d1c1b1a1918, 0x0302151413121110, q16); in TEST()
[all …]
Dtest-api-aarch64.cc232 VIXL_CHECK(AreConsecutive(q14, q15, q16, q17)); in TEST()
Dtest-disasm-aarch64.cc1289 COMPARE(ldr(q16, MemOperand(x17, 65520)), "ldr q16, [x17, #65520]"); in TEST()
1335 COMPARE(ldr(q16, MemOperand(x17, -256, PreIndex)), "ldr q16, [x17, #-256]!"); in TEST()
1393 COMPARE(ldr(q16, MemOperand(x17, -256, PostIndex)), "ldr q16, [x17], #-256"); in TEST()
/external/llvm/test/CodeGen/AArch64/
Darm64-spill.ll12 …,~{q5},~{q6},~{q7},~{q8},~{q9},~{q10},~{q11},~{q12},~{q13},~{q14},~{q15},~{q16},~{q17},~{q18},~{q1…
/external/pcre/dist2/src/
Dpcre2test.c6351 uint16_t *q16 = NULL; in process_data() local
6672 *q16++ = 0xD800 | (c >> 10); in process_data()
6673 *q16++ = 0xDC00 | (c & 0x3ff); in process_data()
6676 *q16++ = c; in process_data()
6688 *q16++ = c; in process_data()
/external/llvm/lib/Target/AArch64/
DAArch64RegisterInfo.td371 def Q16 : AArch64Reg<16, "q16", [D16], ["v16", ""]>, DwarfRegAlias<B16>;
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/
DAArch64RegisterInfo.td390 def Q16 : AArch64Reg<16, "q16", [D16], ["v16", ""]>, DwarfRegAlias<B16>;
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/AArch64/
Dbasic-a64-instructions.s2623 ldr q16, [x24, w8, uxtw #4]
/external/v8/src/arm64/
Dassembler-arm64.h60 V(q16) V(q17) V(q18) V(q19) V(q20) V(q21) V(q22) V(q23) \
/external/capstone/suite/MC/AArch64/
Dbasic-a64-instructions.s.cs1036 0x10,0x5b,0xe8,0x3c = ldr q16, [x24, w8, uxtw #4]
/external/llvm/test/MC/AArch64/
Dbasic-a64-instructions.s2640 ldr q16, [x24, w8, uxtw #4]
/external/llvm/test/MC/Disassembler/AArch64/
Dbasic-a64-instructions.txt2632 # CHECK: ldr q16, [x24, w8, uxtw #4]
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/AArch64/
Dbasic-a64-instructions.txt2616 # CHECK: ldr q16, [x24, w8, uxtw #4]
/external/honggfuzz/examples/apache-httpd/corpus_http1/
D67154715f57204df236d04030732b84d.000eb1d3.honggfuzz.cov2344 蒋X;�M7�-@(q16 zH�����4`̑�8�������oE7��`��p�v#>�z��!�=.��9e�"Ɨ��}v�����Z�n�;�uL�{t�'�…
3034 蒋X;�M7�-@(q16 zH�����4`̑�8�������oE7��`��p�v#>�z��!�=.��9e�"Ɨ��}v�����Z�n�;�uL�{t�'�…
7202 蒋X;�M7�-@(q16 zH�����4`̑�8�������oE7��`��p�v#>�z��!�=.��9e�"Ɨ��}v�����Z�n�;�uL�{t�'�…
/external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/AArch64/
DAArch64GenAsmMatcher.inc683 return 137; // "q16"