Searched refs:q_values (Results 1 – 5 of 5) sorted by relevance
| /external/mesa3d/src/intel/compiler/ |
| D | brw_fs_reg_allocate.cpp | 152 unsigned int **q_values = ralloc_array(compiler, unsigned int *, in brw_alloc_reg_set() local
155 q_values[i] = ralloc_array(q_values, unsigned int, class_count + 1); in brw_alloc_reg_set()
172 q_values[i][j] = (class_sizes[i] + 1) / 2 + in brw_alloc_reg_set()
201 q_values[i][j] = class_sizes[i] + class_sizes[j] - 1; in brw_alloc_reg_set()
268 q_values[class_count][i] = class_sizes[i] / 2 + 1; in brw_alloc_reg_set()
269 q_values[i][class_count] = class_sizes[i] + 1; in brw_alloc_reg_set()
271 q_values[class_count][class_count] = 1; in brw_alloc_reg_set()
274 ra_set_finalize(regs, q_values); in brw_alloc_reg_set()
276 ralloc_free(q_values); in brw_alloc_reg_set()
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| D | brw_vec4_reg_allocate.cpp | 126 unsigned *q_values[MAX_VGRF_SIZE]; in brw_vec4_alloc_reg_set() local
131 q_values[i] = new unsigned[MAX_VGRF_SIZE]; in brw_vec4_alloc_reg_set()
154 q_values[i][j] = class_sizes[i] + class_sizes[j] - 1; in brw_vec4_alloc_reg_set()
162 ra_set_finalize(compiler->vec4_reg_set.regs, q_values); in brw_vec4_alloc_reg_set()
165 delete[] q_values[i]; in brw_vec4_alloc_reg_set()
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| /external/mesa3d/src/gallium/drivers/freedreno/ir3/ |
| D | ir3_ra.c | 134 build_q_values(unsigned int **q_values, unsigned off, in build_q_values() argument
138 q_values[i + off] = rzalloc_array(q_values, unsigned, total_class_count); in build_q_values()
166 q_values[i + off][j + off] = sizes[i] + sizes[j] - 1; in build_q_values()
192 unsigned int **q_values; in ir3_ra_alloc_reg_set() local
204 q_values = ralloc_array(set, unsigned *, total_class_count); in ir3_ra_alloc_reg_set()
206 build_q_values(q_values, 0, class_sizes, class_count); in ir3_ra_alloc_reg_set()
207 build_q_values(q_values, HALF_OFFSET, half_class_sizes, half_class_count); in ir3_ra_alloc_reg_set()
208 build_q_values(q_values, HIGH_OFFSET, high_class_sizes, high_class_count); in ir3_ra_alloc_reg_set()
280 ra_set_finalize(set->regs, q_values); in ir3_ra_alloc_reg_set()
282 ralloc_free(q_values); in ir3_ra_alloc_reg_set()
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| /external/mesa3d/src/util/ |
| D | register_allocate.c | 346 ra_set_finalize(struct ra_regs *regs, unsigned int **q_values) in ra_set_finalize() argument
354 if (q_values) { in ra_set_finalize()
357 regs->classes[b]->q[c] = q_values[b][c]; in ra_set_finalize()
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| /external/mesa3d/src/gallium/drivers/r300/compiler/ |
| D | radeon_pair_regalloc.c | 673 const unsigned q_values[RC_REG_CLASS_COUNT][RC_REG_CLASS_COUNT] = { in rc_init_regalloc_state() local
726 q_values[i][j]; in rc_init_regalloc_state()
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