| /external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/ARM/ |
| D | acle-intrinsics.ll | 186 define i32 @qsax(i32 %a, i32 %b) nounwind {
187 ; CHECK-LABEL: qsax
188 ; CHECK: qsax r0, r0, r1
189 %tmp = call i32 @llvm.arm.qsax(i32 %a, i32 %b)
448 declare i32 @llvm.arm.qsax(i32, i32) nounwind
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| /external/swiftshader/third_party/LLVM/test/MC/Disassembler/ARM/ |
| D | arm-tests.txt | 104 # CHECK: qsax r8, r9, r10
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| D | basic-arm-instructions.txt | 1048 # CHECK: qsax r9, r12, r0
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| D | thumb2.txt | 1263 # CHECK: qsax r9, r12, r0
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| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/ARM/ |
| D | arm-tests.txt | 128 # CHECK: qsax r8, r9, r10
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| D | basic-arm-instructions.txt | 1165 # CHECK: qsax r9, r12, r0
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| D | thumb2.txt | 1402 # CHECK: qsax r9, r12, r0
|
| /external/llvm/test/MC/Disassembler/ARM/ |
| D | arm-tests.txt | 128 # CHECK: qsax r8, r9, r10
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| D | basic-arm-instructions.txt | 1165 # CHECK: qsax r9, r12, r0
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| D | thumb2.txt | 1402 # CHECK: qsax r9, r12, r0
|
| /external/vixl/test/aarch32/ |
| D | test-assembler-cond-rd-rn-rm-t32.cc | 56 M(qsax) \
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| D | test-assembler-cond-rd-rn-rm-a32.cc | 57 M(qsax) \
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| /external/capstone/suite/MC/ARM/ |
| D | basic-arm-instructions.s.cs | 500 0x50,0x9f,0x2c,0xe6 = qsax r9, r12, r0
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| D | basic-thumb2-instructions.s.cs | 596 0xec,0xfa,0x10,0xf9 = qsax r9, r12, r0
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| /external/swiftshader/third_party/LLVM/test/MC/ARM/ |
| D | basic-arm-instructions.s | 1212 qsax r9, r12, r0
1215 @ CHECK: qsax r9, r12, r0 @ encoding: [0x50,0x9f,0x2c,0xe6]
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| D | basic-thumb2-instructions.s | 1463 qsax r9, r12, r0
1467 @ CHECK: qsax r9, r12, r0 @ encoding: [0xec,0xfa,0x10,0xf9]
|
| /external/vixl/src/aarch32/ |
| D | assembler-aarch32.h | 2842 void qsax(Condition cond, Register rd, Register rn, Register rm);
2843 void qsax(Register rd, Register rn, Register rm) { qsax(al, rd, rn, rm); } in qsax() function
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| D | disasm-aarch32.h | 1000 void qsax(Condition cond, Register rd, Register rn, Register rm);
|
| /external/llvm/test/MC/ARM/ |
| D | basic-arm-instructions.s | 1819 qsax r9, r12, r0
1822 @ CHECK: qsax r9, r12, r0 @ encoding: [0x50,0x9f,0x2c,0xe6]
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| D | basic-thumb2-instructions.s | 1890 qsax r9, r12, r0
1894 @ CHECK: qsax r9, r12, r0 @ encoding: [0xec,0xfa,0x10,0xf9]
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/ARM/ |
| D | basic-arm-instructions.s | 1821 qsax r9, r12, r0
1824 @ CHECK: qsax r9, r12, r0 @ encoding: [0x50,0x9f,0x2c,0xe6]
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| D | basic-thumb2-instructions.s | 1938 qsax r9, r12, r0
1942 @ CHECK: qsax r9, r12, r0 @ encoding: [0xec,0xfa,0x10,0xf9]
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| /external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
| D | ARMInstrInfo.td | 3176 def QSAX : AAI<0b01100010, 0b11110101, "qsax">;
4973 def : MnemonicAlias<"qsubaddx", "qsax">;
|
| /external/llvm/lib/Target/ARM/ |
| D | ARMInstrInfo.td | 3577 def QSAX : AAI<0b01100010, 0b11110101, "qsax">;
5683 def : MnemonicAlias<"qsubaddx", "qsax">;
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/ |
| D | ARMInstrInfo.td | 3728 def QSAX : AAIIntrinsic<0b01100010, 0b11110101, "qsax", int_arm_qsax>;
5983 def : MnemonicAlias<"qsubaddx", "qsax">;
|