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/external/llvm/test/MC/Disassembler/Hexagon/
Dnv_st.txt6 # CHECK: r31 = r31
7 # CHECK-NEXT: memb(r17 + r21<<#3) = r31.new
9 # CHECK: r31 = r31
10 # CHECK-NEXT: memb(#17) = r31.new
12 # CHECK: r31 = r31
13 # CHECK-NEXT: memb(r17+#21) = r31.new
15 # CHECK: r31 = r31
16 # CHECK-NEXT: memb(r17 ++ I:circ(m1)) = r31.new
18 # CHECK: r31 = r31
19 # CHECK-NEXT: memb(r17 ++ #5:circ(m1)) = r31.new
[all …]
Dxtype_mpy.txt6 # CHECK: r17 = add(#21, mpyi(r21, r31))
10 # CHECK: r17 = add(r21, mpyi(#84, r31))
14 # CHECK: r17 = add(r21, mpyi(r17, r31))
24 # CHECK: r17 = mpyi(r21, r31)
26 # CHECK: r17 += mpyi(r21, r31)
30 # CHECK: r17:16 = vmpyweh(r21:20, r31:30):sat
32 # CHECK: r17:16 = vmpyweh(r21:20, r31:30):<<1:sat
34 # CHECK: r17:16 = vmpywoh(r21:20, r31:30):sat
36 # CHECK: r17:16 = vmpywoh(r21:20, r31:30):<<1:sat
38 # CHECK: r17:16 = vmpyweh(r21:20, r31:30):rnd:sat
[all …]
Dxtype_alu.txt14 # CHECK: r17 = add(r21, add(r31, #23))
16 # CHECK: r17 = add(r21, sub(#23, r31))
22 # CHECK: r17 += add(r21, r31)
24 # CHECK: r17 -= add(r21, r31)
28 # CHECK: r17:16 = add(r21:20, r31:30)
30 # CHECK: r17:16 = add(r21:20, r31:30):sat
32 # CHECK: r17:16 = add(r21:20, r31:30):raw:lo
34 # CHECK: r17:16 = add(r21:20, r31:30):raw:hi
38 # CHECK: r17 = add(r21.l, r31.l)
40 # CHECK: r17 = add(r21.l, r31.h)
[all …]
Dxtype_complex.txt6 # CHECK: r17:16 = vxaddsubh(r21:20, r31:30):sat
8 # CHECK: r17:16 = vxsubaddh(r21:20, r31:30):sat
10 # CHECK: r17:16 = vxaddsubh(r21:20, r31:30):rnd:>>1:sat
12 # CHECK: r17:16 = vxsubaddh(r21:20, r31:30):rnd:>>1:sat
16 # CHECK: r17:16 = vxaddsubw(r21:20, r31:30):sat
18 # CHECK: r17:16 = vxsubaddw(r21:20, r31:30):sat
22 # CHECK: r17:16 = cmpy(r21, r31):sat
24 # CHECK: r17:16 = cmpy(r21, r31):<<1:sat
26 # CHECK: r17:16 = cmpy(r21, r31*):sat
28 # CHECK: r17:16 = cmpy(r21, r31*):<<1:sat
[all …]
Dxtype_shift.txt54 # CHECK: r17 = addasl(r21, r31, #7)
110 # CHECK: r17:16 = asr(r21:20, r31)
112 # CHECK: r17:16 = lsr(r21:20, r31)
114 # CHECK: r17:16 = asl(r21:20, r31)
116 # CHECK: r17:16 = lsl(r21:20, r31)
118 # CHECK: r17 = asr(r21, r31)
120 # CHECK: r17 = lsr(r21, r31)
122 # CHECK: r17 = asl(r21, r31)
124 # CHECK: r17 = lsl(r21, r31)
126 # CHECK: r17 = lsl(#21, r31)
[all …]
Dalu32_alu.txt8 # CHECK: r17 = add(r21, r31)
10 # CHECK: r17 = add(r21, r31):sat
18 # CHECK: r17 = and(r21, r31)
20 # CHECK: r17 = or(r21, r31)
22 # CHECK: r17 = xor(r21, r31)
24 # CHECK: r17 = and(r21, ~r31)
26 # CHECK: r17 = or(r21, ~r31)
34 # CHECK: r17 = sub(#21, r31)
36 # CHECK: r17 = sub(r31, r21)
38 # CHECK: r17 = sub(r31, r21):sat
[all …]
Dalu32_pred.txt16 # CHECK: if (p3) r17 = add(r21, r31)
19 # CHECK-NEXT: if (p3.new) r17 = add(r21, r31)
21 # CHECK: if (!p3) r17 = add(r21, r31)
24 # CHECK-NEXT: if (!p3.new) r17 = add(r21, r31)
50 # CHECK: if (p3) r17:16 = combine(r21, r31)
52 # CHECK: if (!p3) r17:16 = combine(r21, r31)
55 # CHECK-NEXT: if (p3.new) r17:16 = combine(r21, r31)
58 # CHECK-NEXT: if (!p3.new) r17:16 = combine(r21, r31)
62 # CHECK: if (p3) r17 = and(r21, r31)
64 # CHECK: if (!p3) r17 = and(r21, r31)
[all …]
Dalu32_perm.txt6 # CHECK: r17 = combine(r31.h, r21.h)
8 # CHECK: r17 = combine(r31.h, r21.l)
10 # CHECK: r17 = combine(r31.l, r21.h)
12 # CHECK: r17 = combine(r31.l, r21.l)
16 # CHECK: r17:16 = combine(#21, r31)
20 # CHECK: r17:16 = combine(r21, r31)
26 # CHECK: r17 = mux(p3, #21, r31)
30 # CHECK: r17 = mux(p3, r21, r31)
40 # CHECK: r17:16 = packhl(r21, r31)
Dst.txt6 # CHECK: memd(r17 + r21<<#3) = r31:30
20 # CHECK: memd(r17<<#3 + ##21) = r31:30
28 # CHECK: if (p3) memd(r17+r21<<#3) = r31:30
30 # CHECK: if (!p3) memd(r17+r21<<#3) = r31:30
33 # CHECK-NEXT: if (p3.new) memd(r17+r21<<#3) = r31:30
36 # CHECK-NEXT: if (!p3.new) memd(r17+r21<<#3) = r31:30
38 # CHECK: if (p3) memd(r17+#168) = r31:30
40 # CHECK: if (!p3) memd(r17+#168) = r31:30
43 # CHECK-NEXT: if (p3.new) memd(r17+#168) = r31:30
46 # CHECK-NEXT: if (!p3.new) memd(r17+#168) = r31:30
[all …]
Dxtype_bit.txt50 # CHECK: r17:16 = extractu(r21:20, r31:30)
52 # CHECK: r17:16 = extract(r21:20, r31:30)
54 # CHECK: r17 = extractu(r21, r31:30)
56 # CHECK: r17 = extract(r21, r31:30)
64 # CHECK: r17 = insert(r21, r31:30)
66 # CHECK: r17:16 = insert(r21:20, r31:30)
76 # CHECK: r17:16 = lfs(r21:20, r31:30)
80 # CHECK: r17 = parity(r21:20, r31:30)
82 # CHECK: r17 = parity(r21, r31)
98 # CHECK: r17 = setbit(r21, r31)
[all …]
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/Hexagon/
Dnv_st.txt6 # CHECK: r31 = r31
7 # CHECK-NEXT: memb(r17+r21<<#3) = r31.new
9 # CHECK: r31 = r31
10 # CHECK-NEXT: memb(gp+#17) = r31.new
12 # CHECK: r31 = r31
13 # CHECK-NEXT: memb(r17+#21) = r31.new
15 # CHECK: r31 = r31
16 # CHECK-NEXT: memb(r17++I:circ(m1)) = r31.new
18 # CHECK: r31 = r31
19 # CHECK-NEXT: memb(r17++#5:circ(m1)) = r31.new
[all …]
Dxtype_mpy.txt6 # CHECK: r17 = add(#21,mpyi(r21,r31))
10 # CHECK: r17 = add(r21,mpyi(#84,r31))
14 # CHECK: r17 = add(r21,mpyi(r17,r31))
24 # CHECK: r17 = mpyi(r21,r31)
26 # CHECK: r17 += mpyi(r21,r31)
30 # CHECK: r17:16 = vmpyweh(r21:20,r31:30):sat
32 # CHECK: r17:16 = vmpyweh(r21:20,r31:30):<<1:sat
34 # CHECK: r17:16 = vmpywoh(r21:20,r31:30):sat
36 # CHECK: r17:16 = vmpywoh(r21:20,r31:30):<<1:sat
38 # CHECK: r17:16 = vmpyweh(r21:20,r31:30):rnd:sat
[all …]
Dxtype_alu.txt14 # CHECK: r17 = add(r21,add(r31,#23))
16 # CHECK: r17 = add(r21,sub(#23,r31))
22 # CHECK: r17 += add(r21,r31)
24 # CHECK: r17 -= add(r21,r31)
28 # CHECK: r17:16 = add(r21:20,r31:30)
30 # CHECK: r17:16 = add(r21:20,r31:30):sat
32 # CHECK: r17:16 = add(r21:20,r31:30):raw:lo
34 # CHECK: r17:16 = add(r21:20,r31:30):raw:hi
38 # CHECK: r17 = add(r21.l,r31.l)
40 # CHECK: r17 = add(r21.l,r31.h)
[all …]
Dxtype_complex.txt6 # CHECK: r17:16 = vxaddsubh(r21:20,r31:30):sat
8 # CHECK: r17:16 = vxsubaddh(r21:20,r31:30):sat
10 # CHECK: r17:16 = vxaddsubh(r21:20,r31:30):rnd:>>1:sat
12 # CHECK: r17:16 = vxsubaddh(r21:20,r31:30):rnd:>>1:sat
16 # CHECK: r17:16 = vxaddsubw(r21:20,r31:30):sat
18 # CHECK: r17:16 = vxsubaddw(r21:20,r31:30):sat
22 # CHECK: r17:16 = cmpy(r21,r31):sat
24 # CHECK: r17:16 = cmpy(r21,r31):<<1:sat
26 # CHECK: r17:16 = cmpy(r21,r31*):sat
28 # CHECK: r17:16 = cmpy(r21,r31*):<<1:sat
[all …]
Dxtype_shift.txt54 # CHECK: r17 = addasl(r21,r31,#7)
110 # CHECK: r17:16 = asr(r21:20,r31)
112 # CHECK: r17:16 = lsr(r21:20,r31)
114 # CHECK: r17:16 = asl(r21:20,r31)
116 # CHECK: r17:16 = lsl(r21:20,r31)
118 # CHECK: r17 = asr(r21,r31)
120 # CHECK: r17 = lsr(r21,r31)
122 # CHECK: r17 = asl(r21,r31)
124 # CHECK: r17 = lsl(r21,r31)
126 # CHECK: r17 = lsl(#21,r31)
[all …]
Dalu32_alu.txt8 # CHECK: r17 = add(r21,r31)
10 # CHECK: r17 = add(r21,r31):sat
18 # CHECK: r17 = and(r21,r31)
20 # CHECK: r17 = or(r21,r31)
22 # CHECK: r17 = xor(r21,r31)
24 # CHECK: r17 = and(r21,~r31)
26 # CHECK: r17 = or(r21,~r31)
34 # CHECK: r17 = sub(#21,r31)
36 # CHECK: r17 = sub(r31,r21)
38 # CHECK: r17 = sub(r31,r21):sat
[all …]
Dalu32_pred.txt16 # CHECK: if (p3) r17 = add(r21,r31)
19 # CHECK-NEXT: if (p3.new) r17 = add(r21,r31)
21 # CHECK: if (!p3) r17 = add(r21,r31)
24 # CHECK-NEXT: if (!p3.new) r17 = add(r21,r31)
50 # CHECK: if (p3) r17:16 = combine(r21,r31)
52 # CHECK: if (!p3) r17:16 = combine(r21,r31)
55 # CHECK-NEXT: if (p3.new) r17:16 = combine(r21,r31)
58 # CHECK-NEXT: if (!p3.new) r17:16 = combine(r21,r31)
62 # CHECK: if (p3) r17 = and(r21,r31)
64 # CHECK: if (!p3) r17 = and(r21,r31)
[all …]
Dalu32_perm.txt6 # CHECK: r17 = combine(r31.h,r21.h)
8 # CHECK: r17 = combine(r31.h,r21.l)
10 # CHECK: r17 = combine(r31.l,r21.h)
12 # CHECK: r17 = combine(r31.l,r21.l)
16 # CHECK: r17:16 = combine(#21,r31)
20 # CHECK: r17:16 = combine(r21,r31)
26 # CHECK: r17 = mux(p3,#21,r31)
30 # CHECK: r17 = mux(p3,r21,r31)
40 # CHECK: r17:16 = packhl(r21,r31)
Dst.txt6 # CHECK: memd(r17+r21<<#3) = r31:30
20 # CHECK: memd(r17<<#3+##21) = r31:30
28 # CHECK: if (p3) memd(r17+r21<<#3) = r31:30
30 # CHECK: if (!p3) memd(r17+r21<<#3) = r31:30
33 # CHECK-NEXT: if (p3.new) memd(r17+r21<<#3) = r31:30
36 # CHECK-NEXT: if (!p3.new) memd(r17+r21<<#3) = r31:30
38 # CHECK: if (p3) memd(r17+#168) = r31:30
40 # CHECK: if (!p3) memd(r17+#168) = r31:30
43 # CHECK-NEXT: if (p3.new) memd(r17+#168) = r31:30
46 # CHECK-NEXT: if (!p3.new) memd(r17+#168) = r31:30
[all …]
Dxtype_bit.txt50 # CHECK: r17:16 = extractu(r21:20,r31:30)
52 # CHECK: r17:16 = extract(r21:20,r31:30)
54 # CHECK: r17 = extractu(r21,r31:30)
56 # CHECK: r17 = extract(r21,r31:30)
64 # CHECK: r17 = insert(r21,r31:30)
66 # CHECK: r17:16 = insert(r21:20,r31:30)
76 # CHECK: r17:16 = lfs(r21:20,r31:30)
80 # CHECK: r17 = parity(r21:20,r31:30)
82 # CHECK: r17 = parity(r21,r31)
98 # CHECK: r17 = setbit(r21,r31)
[all …]
/external/python/cpython2/Modules/_ctypes/libffi/src/m88k/
Dobsd.S58 subu %r31, %r31, 32
59 st %r30, %r31, 4
60 st %r1, %r31, 0
61 addu %r30, %r31, 32
99 subu %r31, %r30, 32
157 ld %r2, %r31, (8 * 4)
162 ld.d %r2, %r31, (8 * 4)
167 subu %r31, %r30, 16
168 ld %r1, %r31, 0
169 ld %r30, %r31, 4
[all …]
/external/libffi/src/m88k/
Dobsd.S58 subu %r31, %r31, 32
59 st %r30, %r31, 4
60 st %r1, %r31, 0
61 addu %r30, %r31, 32
99 subu %r31, %r30, 32
157 ld %r2, %r31, (8 * 4)
162 ld.d %r2, %r31, (8 * 4)
167 subu %r31, %r30, 16
168 ld %r1, %r31, 0
169 ld %r30, %r31, 4
[all …]
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/Hexagon/
Dbit-cmp0.mir20 # CHECK: PS_jmpret $r31, implicit-def dead $pc, implicit $r0
29 PS_jmpret $r31, implicit-def dead $pc, implicit $r0
36 # CHECK: PS_jmpret $r31, implicit-def dead $pc, implicit $r0
45 PS_jmpret $r31, implicit-def dead $pc, implicit $r0
52 # CHECK: PS_jmpret $r31, implicit-def dead $pc, implicit $r0
61 PS_jmpret $r31, implicit-def dead $pc, implicit $r0
68 # CHECK: PS_jmpret $r31, implicit-def dead $pc, implicit $r0
77 PS_jmpret $r31, implicit-def dead $pc, implicit $r0
86 # CHECK: PS_jmpret $r31, implicit-def dead $pc, implicit $r0
97 PS_jmpret $r31, implicit-def dead $pc, implicit $r0
[all …]
Dbranchfolder-insert-impdef.mir26 liveins: $r31
32 liveins: $r31
39 liveins: $r31
45 liveins: $r31
46 PS_jmpret killed $r31, implicit-def $pc
63 liveins: $r31
69 liveins: $r31
77 liveins: $r31
85 liveins: $r31
86 PS_jmpret killed $r31, implicit undef $r0, implicit-def $pc
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/AVR/
Dinst-muls.s8 muls r28, r31
9 muls r31, r31
13 ; CHECK: muls r28, r31 ; encoding: [0xcf,0x02]
14 ; CHECK: muls r31, r31 ; encoding: [0xff,0x02]

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