| /external/linux-kselftest/tools/testing/selftests/powerpc/pmu/ |
| D | loop.S | 13 addi r4,r3,1
14 addi r4,r4,1
15 addi r4,r4,1
16 addi r4,r4,1
17 addi r4,r4,1
18 addi r4,r4,1
19 addi r4,r4,1
20 addi r4,r4,1
21 addi r4,r4,1
22 addi r4,r4,1
[all …]
|
| /external/linux-kselftest/tools/testing/selftests/powerpc/pmu/ebb/ |
| D | fixed_instruction_loop.S | 13 addi r4,r3,1
14 addi r4,r4,1
15 addi r4,r4,1
16 addi r4,r4,1
17 addi r4,r4,1
18 addi r4,r4,1
19 addi r4,r4,1
20 addi r4,r4,1
21 addi r4,r4,1
22 addi r4,r4,1
[all …]
|
| /external/llvm/test/MC/ARM/ |
| D | neon-vld-vst-align.s | 5 vld1.8 {d0}, [r4]
6 vld1.8 {d0}, [r4:16]
7 vld1.8 {d0}, [r4:32]
8 vld1.8 {d0}, [r4:64]
9 vld1.8 {d0}, [r4:128]
10 vld1.8 {d0}, [r4:256]
12 @ CHECK: vld1.8 {d0}, [r4] @ encoding: [0x24,0xf9,0x0f,0x07]
14 @ CHECK-ERRORS: vld1.8 {d0}, [r4:16]
17 @ CHECK-ERRORS: vld1.8 {d0}, [r4:32]
19 @ CHECK: vld1.8 {d0}, [r4:64] @ encoding: [0x24,0xf9,0x1f,0x07]
[all …]
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/ARM/ |
| D | neon-vld-vst-align.s | 5 vld1.8 {d0}, [r4]
6 vld1.8 {d0}, [r4:16]
7 vld1.8 {d0}, [r4:32]
8 vld1.8 {d0}, [r4:64]
9 vld1.8 {d0}, [r4:128]
10 vld1.8 {d0}, [r4:256]
12 @ CHECK: vld1.8 {d0}, [r4] @ encoding: [0x24,0xf9,0x0f,0x07]
14 @ CHECK-ERRORS: vld1.8 {d0}, [r4:16]
17 @ CHECK-ERRORS: vld1.8 {d0}, [r4:32]
19 @ CHECK: vld1.8 {d0}, [r4:64] @ encoding: [0x24,0xf9,0x1f,0x07]
[all …]
|
| /external/capstone/suite/MC/ARM/ |
| D | basic-arm-instructions.s.cs | 14 0x06,0x40,0xa5,0xe0 = adc r4, r5, r6
15 0x86,0x40,0xa5,0xe0 = adc r4, r5, r6, lsl #1
16 0x86,0x4f,0xa5,0xe0 = adc r4, r5, r6, lsl #31
17 0xa6,0x40,0xa5,0xe0 = adc r4, r5, r6, lsr #1
18 0xa6,0x4f,0xa5,0xe0 = adc r4, r5, r6, lsr #31
19 0x26,0x40,0xa5,0xe0 = adc r4, r5, r6, lsr #32
20 0xc6,0x40,0xa5,0xe0 = adc r4, r5, r6, asr #1
21 0xc6,0x4f,0xa5,0xe0 = adc r4, r5, r6, asr #31
22 0x46,0x40,0xa5,0xe0 = adc r4, r5, r6, asr #32
23 0xe6,0x40,0xa5,0xe0 = adc r4, r5, r6, ror #1
[all …]
|
| D | basic-thumb2-instructions.s.cs | 9 0x42,0xf1,0xff,0x44 = adc r4, r2, #2139095040
10 0x42,0xf5,0xd0,0x64 = adc r4, r2, #1664
11 0x45,0xeb,0x06,0x04 = adc.w r4, r5, r6
12 0x55,0xeb,0x06,0x04 = adcs.w r4, r5, r6
22 0x05,0xf2,0x25,0x14 = addweq r4, r5, #293
45 0x08,0xeb,0x31,0x34 = add.w r4, r8, r1, ror #12
56 0x04,0xf0,0xff,0x35 = and r5, r4, #4294967295
58 0x09,0xea,0x08,0x04 = and.w r4, r9, r8
59 0x04,0xea,0xe8,0x01 = and.w r1, r4, r8, asr #3
61 0x15,0xea,0x12,0x54 = ands.w r4, r5, r2, lsr #20
[all …]
|
| /external/u-boot/arch/powerpc/cpu/mpc83xx/ |
| D | start.S | 109 mflr r4
114 mtspr SRR0, r4
120 lfd 1, 0(r4)
127 stfd 1, 0(r4)
164 lis r4, CONFIG_DEFAULT_IMMR@h
176 lwz r6, IMMRBAR(r4)
179 stw r3, IMMRBAR(r4)
209 lis r4, (CONFIG_SYS_MONITOR_BASE)@h
210 ori r4, r4, (CONFIG_SYS_MONITOR_BASE)@l
211 addi r5, r4, in_flash - _start + EXC_OFF_SYS_RESET
[all …]
|
| /external/u-boot/arch/sh/lib/ |
| D | ashiftrt.S | 56 rotcl r4
58 subc r4,r4
60 shar r4
62 shar r4
64 shar r4
66 shar r4
68 shar r4
70 shar r4
72 shlr16 r4
73 shlr8 r4
[all …]
|
| D | udivsi3_i4i-Os.S | 28 mov.l r4,@-r15
31 swap.w r4,r0
32 shlr16 r4
38 div1 r5,r4
40 div1 r5,r4
41 div1 r5,r4
43 div1 r5,r4
44 xtrct r4,r0
45 xtrct r0,r4
47 swap.w r4,r4
[all …]
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/Thumb/ |
| D | segmented-stacks.ll | 17 ; Thumb-android: push {r4, r5}
19 ; Thumb-android-NEXT: ldr r4, .LCPI0_0
20 ; Thumb-android-NEXT: ldr r4, [r4]
21 ; Thumb-android-NEXT: cmp r4, r5
24 ; Thumb-android: mov r4, #48
28 ; Thumb-android-NEXT: pop {r4}
29 ; Thumb-android-NEXT: mov lr, r4
30 ; Thumb-android-NEXT: pop {r4, r5}
33 ; Thumb-android: pop {r4, r5}
41 ; Thumb-linux: push {r4, r5}
[all …]
|
| /external/llvm/test/CodeGen/Thumb/ |
| D | segmented-stacks.ll | 17 ; Thumb-android: push {r4, r5}
19 ; Thumb-android-NEXT: ldr r4, .LCPI0_0
20 ; Thumb-android-NEXT: ldr r4, [r4]
21 ; Thumb-android-NEXT: cmp r4, r5
24 ; Thumb-android: mov r4, #48
28 ; Thumb-android-NEXT: pop {r4}
29 ; Thumb-android-NEXT: mov lr, r4
30 ; Thumb-android-NEXT: pop {r4, r5}
33 ; Thumb-android: pop {r4, r5}
41 ; Thumb-linux: push {r4, r5}
[all …]
|
| /external/swiftshader/third_party/LLVM/test/MC/ARM/ |
| D | basic-arm-instructions.s | 48 adc r4, r5, r6
50 adc r4, r5, r6, lsl #1
51 adc r4, r5, r6, lsl #31
52 adc r4, r5, r6, lsr #1
53 adc r4, r5, r6, lsr #31
54 adc r4, r5, r6, lsr #32
55 adc r4, r5, r6, asr #1
56 adc r4, r5, r6, asr #31
57 adc r4, r5, r6, asr #32
58 adc r4, r5, r6, ror #1
[all …]
|
| /external/vixl/test/aarch32/ |
| D | test-assembler-cond-rdlow-rnlow-rmlow-in-it-block-t32.cc | 99 {{eq, r0, r4, r0}, true, eq, "eq r0 r4 r0", "eq_r0_r4_r0"},
107 {{eq, r1, r4, r1}, true, eq, "eq r1 r4 r1", "eq_r1_r4_r1"},
115 {{eq, r2, r4, r2}, true, eq, "eq r2 r4 r2", "eq_r2_r4_r2"},
123 {{eq, r3, r4, r3}, true, eq, "eq r3 r4 r3", "eq_r3_r4_r3"},
127 {{eq, r4, r0, r4}, true, eq, "eq r4 r0 r4", "eq_r4_r0_r4"},
128 {{eq, r4, r1, r4}, true, eq, "eq r4 r1 r4", "eq_r4_r1_r4"},
129 {{eq, r4, r2, r4}, true, eq, "eq r4 r2 r4", "eq_r4_r2_r4"},
130 {{eq, r4, r3, r4}, true, eq, "eq r4 r3 r4", "eq_r4_r3_r4"},
131 {{eq, r4, r4, r4}, true, eq, "eq r4 r4 r4", "eq_r4_r4_r4"},
132 {{eq, r4, r5, r4}, true, eq, "eq r4 r5 r4", "eq_r4_r5_r4"},
[all …]
|
| D | test-assembler-cond-rd-rn-operand-rm-all-low-in-it-block-t32.cc | 99 {{ls, r4, r3, r6}, true, ls, "ls r4 r3 r6", "ls_r4_r3_r6"},
100 {{pl, r5, r3, r4}, true, pl, "pl r5 r3 r4", "pl_r5_r3_r4"},
103 {{vc, r4, r3, r4}, true, vc, "vc r4 r3 r4", "vc_r4_r3_r4"},
105 {{ls, r3, r4, r0}, true, ls, "ls r3 r4 r0", "ls_r3_r4_r0"},
106 {{gt, r6, r4, r3}, true, gt, "gt r6 r4 r3", "gt_r6_r4_r3"},
108 {{eq, r4, r6, r0}, true, eq, "eq r4 r6 r0", "eq_r4_r6_r0"},
110 {{cs, r1, r4, r7}, true, cs, "cs r1 r4 r7", "cs_r1_r4_r7"},
113 {{lt, r4, r3, r3}, true, lt, "lt r4 r3 r3", "lt_r4_r3_r3"},
114 {{le, r5, r5, r4}, true, le, "le r5 r5 r4", "le_r5_r5_r4"},
116 {{cc, r0, r4, r7}, true, cc, "cc r0 r4 r7", "cc_r0_r4_r7"},
[all …]
|
| D | test-assembler-cond-rd-rn-operand-rm-all-low-rd-is-rn-in-it-block-t32.cc | 111 {{lt, r0, r0, r4}, true, lt, "lt r0 r0 r4", "lt_r0_r0_r4"},
117 {{cc, r4, r4, r3}, true, cc, "cc r4 r4 r3", "cc_r4_r4_r3"},
121 {{cc, r4, r4, r4}, true, cc, "cc r4 r4 r4", "cc_r4_r4_r4"},
134 {{ne, r3, r3, r4}, true, ne, "ne r3 r3 r4", "ne_r3_r3_r4"},
139 {{ls, r5, r5, r4}, true, ls, "ls r5 r5 r4", "ls_r5_r5_r4"},
143 {{cc, r7, r7, r4}, true, cc, "cc r7 r7 r4", "cc_r7_r7_r4"},
167 {{pl, r7, r7, r4}, true, pl, "pl r7 r7 r4", "pl_r7_r7_r4"},
175 {{eq, r4, r4, r5}, true, eq, "eq r4 r4 r5", "eq_r4_r4_r5"},
176 {{cs, r3, r3, r4}, true, cs, "cs r3 r3 r4", "cs_r3_r3_r4"},
181 {{vc, r4, r4, r2}, true, vc, "vc r4 r4 r2", "vc_r4_r4_r2"},
[all …]
|
| D | test-assembler-cond-rdlow-rnlow-operand-immediate-imm8-t32.cc | 1121 {{al, r4, r4, 0}, false, al, "al r4 r4 0", "al_r4_r4_0"},
1122 {{al, r4, r4, 1}, false, al, "al r4 r4 1", "al_r4_r4_1"},
1123 {{al, r4, r4, 2}, false, al, "al r4 r4 2", "al_r4_r4_2"},
1124 {{al, r4, r4, 3}, false, al, "al r4 r4 3", "al_r4_r4_3"},
1125 {{al, r4, r4, 4}, false, al, "al r4 r4 4", "al_r4_r4_4"},
1126 {{al, r4, r4, 5}, false, al, "al r4 r4 5", "al_r4_r4_5"},
1127 {{al, r4, r4, 6}, false, al, "al r4 r4 6", "al_r4_r4_6"},
1128 {{al, r4, r4, 7}, false, al, "al r4 r4 7", "al_r4_r4_7"},
1129 {{al, r4, r4, 8}, false, al, "al r4 r4 8", "al_r4_r4_8"},
1130 {{al, r4, r4, 9}, false, al, "al r4 r4 9", "al_r4_r4_9"},
[all …]
|
| D | test-assembler-cond-rd-operand-rn-shift-rs-in-it-block-t32.cc | 100 {{vc, r4, r4, ROR, r1}, true, vc, "vc r4 r4 ROR r1", "vc_r4_r4_ROR_r1"},
102 {{vc, r4, r4, LSR, r4}, true, vc, "vc r4 r4 LSR r4", "vc_r4_r4_LSR_r4"},
108 {{mi, r4, r4, LSL, r5}, true, mi, "mi r4 r4 LSL r5", "mi_r4_r4_LSL_r5"},
118 {{ge, r4, r4, ASR, r1}, true, ge, "ge r4 r4 ASR r1", "ge_r4_r4_ASR_r1"},
124 {{ne, r3, r3, ROR, r4}, true, ne, "ne r3 r3 ROR r4", "ne_r3_r3_ROR_r4"},
126 {{ls, r7, r7, LSL, r4}, true, ls, "ls r7 r7 LSL r4", "ls_r7_r7_LSL_r4"},
127 {{ge, r4, r4, LSL, r0}, true, ge, "ge r4 r4 LSL r0", "ge_r4_r4_LSL_r0"},
128 {{vs, r4, r4, LSR, r4}, true, vs, "vs r4 r4 LSR r4", "vs_r4_r4_LSR_r4"},
133 {{eq, r4, r4, ROR, r4}, true, eq, "eq r4 r4 ROR r4", "eq_r4_r4_ROR_r4"},
137 {{lt, r4, r4, ROR, r3}, true, lt, "lt r4 r4 ROR r3", "lt_r4_r4_ROR_r3"},
[all …]
|
| D | test-assembler-cond-rdlow-rnlow-operand-immediate-imm8-in-it-block-t32.cc | 103 {{ge, r4, r4, 195}, true, ge, "ge r4 r4 195", "ge_r4_r4_195"},
111 {{hi, r4, r4, 60}, true, hi, "hi r4 r4 60", "hi_r4_r4_60"},
127 {{ls, r4, r4, 225}, true, ls, "ls r4 r4 225", "ls_r4_r4_225"},
133 {{cc, r4, r4, 68}, true, cc, "cc r4 r4 68", "cc_r4_r4_68"},
142 {{ne, r4, r4, 210}, true, ne, "ne r4 r4 210", "ne_r4_r4_210"},
148 {{eq, r4, r4, 233}, true, eq, "eq r4 r4 233", "eq_r4_r4_233"},
153 {{le, r4, r4, 0}, true, le, "le r4 r4 0", "le_r4_r4_0"},
160 {{vs, r4, r4, 142}, true, vs, "vs r4 r4 142", "vs_r4_r4_142"},
173 {{lt, r4, r4, 128}, true, lt, "lt r4 r4 128", "lt_r4_r4_128"},
179 {{mi, r4, r4, 176}, true, mi, "mi r4 r4 176", "mi_r4_r4_176"},
[all …]
|
| D | test-assembler-cond-rd-operand-rn-low-registers-in-it-block-t32.cc | 99 {{eq, r0, r4}, true, eq, "eq r0 r4", "eq_r0_r4"},
107 {{eq, r1, r4}, true, eq, "eq r1 r4", "eq_r1_r4"},
115 {{eq, r2, r4}, true, eq, "eq r2 r4", "eq_r2_r4"},
123 {{eq, r3, r4}, true, eq, "eq r3 r4", "eq_r3_r4"},
127 {{eq, r4, r0}, true, eq, "eq r4 r0", "eq_r4_r0"},
128 {{eq, r4, r1}, true, eq, "eq r4 r1", "eq_r4_r1"},
129 {{eq, r4, r2}, true, eq, "eq r4 r2", "eq_r4_r2"},
130 {{eq, r4, r3}, true, eq, "eq r4 r3", "eq_r4_r3"},
131 {{eq, r4, r4}, true, eq, "eq r4 r4", "eq_r4_r4"},
132 {{eq, r4, r5}, true, eq, "eq r4 r5", "eq_r4_r5"},
[all …]
|
| D | test-assembler-cond-rdlow-rnlow-operand-immediate-zero-in-it-block-t32.cc | 99 {{eq, r0, r4, 0}, true, eq, "eq r0 r4 0", "eq_r0_r4_0"},
107 {{eq, r1, r4, 0}, true, eq, "eq r1 r4 0", "eq_r1_r4_0"},
115 {{eq, r2, r4, 0}, true, eq, "eq r2 r4 0", "eq_r2_r4_0"},
123 {{eq, r3, r4, 0}, true, eq, "eq r3 r4 0", "eq_r3_r4_0"},
127 {{eq, r4, r0, 0}, true, eq, "eq r4 r0 0", "eq_r4_r0_0"},
128 {{eq, r4, r1, 0}, true, eq, "eq r4 r1 0", "eq_r4_r1_0"},
129 {{eq, r4, r2, 0}, true, eq, "eq r4 r2 0", "eq_r4_r2_0"},
130 {{eq, r4, r3, 0}, true, eq, "eq r4 r3 0", "eq_r4_r3_0"},
131 {{eq, r4, r4, 0}, true, eq, "eq r4 r4 0", "eq_r4_r4_0"},
132 {{eq, r4, r5, 0}, true, eq, "eq r4 r5 0", "eq_r4_r5_0"},
[all …]
|
| /external/u-boot/post/lib_powerpc/ |
| D | asm.S | 26 mr r3, r4
27 mr r4, r5
49 mr r3, r4
50 mr r4, r5
69 stwu r4, -4(r1)
73 mr r4, r6
76 lwz r4, 0(r1)
77 stw r3, 0(r4)
90 stwu r4, -4(r1)
96 lwz r4, 0(r1)
[all …]
|
| /external/u-boot/arch/powerpc/lib/ |
| D | ppcstring.S | 13 addi r4,r4,-1
14 1: lbzu r0,1(r4)
26 addi r4,r4,-1
27 1: lbzu r0,1(r4)
36 addi r4,r4,-1
41 1: lbzu r0,1(r4)
50 addi r4,r4,-1
53 lbzu r0,1(r4)
61 addi r4,r3,-1
62 1: lbzu r0,1(r4)
[all …]
|
| /external/llvm/test/CodeGen/ARM/ |
| D | segmented-stacks.ll | 19 ; ARM-linux: push {r4, r5}
20 ; ARM-linux-NEXT: mrc p15, #0, r4, c13, c0, #3
22 ; ARM-linux-NEXT: ldr r4, [r4, #4]
23 ; ARM-linux-NEXT: cmp r4, r5
26 ; ARM-linux: mov r4, #48
31 ; ARM-linux-NEXT: pop {r4, r5}
34 ; ARM-linux: pop {r4, r5}
38 ; ARM-android: push {r4, r5}
39 ; ARM-android-NEXT: mrc p15, #0, r4, c13, c0, #3
41 ; ARM-android-NEXT: ldr r4, [r4, #252]
[all …]
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/ARM/ |
| D | segmented-stacks.ll | 19 ; ARM-linux: push {r4, r5}
20 ; ARM-linux-NEXT: mrc p15, #0, r4, c13, c0, #3
22 ; ARM-linux-NEXT: ldr r4, [r4, #4]
23 ; ARM-linux-NEXT: cmp r4, r5
26 ; ARM-linux: mov r4, #48
31 ; ARM-linux-NEXT: pop {r4, r5}
34 ; ARM-linux: pop {r4, r5}
38 ; ARM-android: push {r4, r5}
39 ; ARM-android-NEXT: mrc p15, #0, r4, c13, c0, #3
41 ; ARM-android-NEXT: ldr r4, [r4, #252]
[all …]
|
| /external/u-boot/arch/powerpc/cpu/mpc85xx/ |
| D | start.S | 92 li r4,CONFIG_SYS_FSL_ERRATUM_A004510_SVR_REV
93 cmpw r3,r4
97 li r4,CONFIG_SYS_FSL_ERRATUM_A004510_SVR_REV2
98 cmpw r3,r4
111 li r4,0x48
112 rlwimi r3,r4,0,0x1f8
137 and. r4, r3, r2
157 andc r4, r3, r2
160 mtspr SPRN_L2CSR0,r4
254 li r4,CriticalInput@l
[all …]
|