| /external/capstone/suite/MC/ARM/ |
| D | thumb2-narrow-dp.ll.cs | 10 0x11,0xea,0x08,0x08 = ands.w r8, r1, r8
11 0x18,0xea,0x01,0x08 = ands.w r8, r8, r1
12 0x18,0xea,0x00,0x00 = ands.w r0, r8, r0
13 0x11,0xea,0x08,0x01 = ands.w r1, r1, r8
33 0x01,0xea,0x08,0x08 = andeq.w r8, r1, r8
35 0x08,0xea,0x01,0x08 = andeq.w r8, r8, r1
37 0x08,0xea,0x04,0x04 = andeq.w r4, r8, r4
39 0x04,0xea,0x08,0x04 = andeq.w r4, r4, r8
52 0x91,0xea,0x08,0x08 = eors.w r8, r1, r8
53 0x98,0xea,0x01,0x08 = eors.w r8, r8, r1
[all …]
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| D | basic-thumb2-instructions.s.cs | 6 0x4c,0xf1,0xaa,0x28 = adc r8, r12, #2852170240
24 0x08,0xf5,0x7f,0x42 = add.w r2, r8, #65280
41 0x02,0xeb,0x08,0x01 = add.w r1, r2, r8
45 0x08,0xeb,0x31,0x34 = add.w r4, r8, r1, ror #12
46 0xc2,0x44 = add r10, r8
47 0xc2,0x44 = add r10, r8
58 0x09,0xea,0x08,0x04 = and.w r4, r9, r8
59 0x04,0xea,0xe8,0x01 = and.w r1, r4, r8, asr #3
64 0x5f,0xea,0x23,0x08 = asrs.w r8, r3, #32
69 0x5f,0xea,0xa8,0x08 = asrs.w r8, r8, #2
[all …]
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| D | arm-memory-instructions.s.cs | 8 0x01,0x30,0x98,0xe7 = ldr r3, [r8, r1]
11 0x08,0x60,0x37,0xe7 = ldr r6, [r7, -r8]!
15 0x82,0x37,0x18,0xe7 = ldr r3, [r8, -r2, lsl #15]
17 0x00,0x30,0xd8,0xe5 = ldrb r3, [r8]
20 0x16,0x80,0xd1,0xe4 = ldrb r8, [r1], #22
22 0x05,0x90,0xd8,0xe7 = ldrb r9, [r8, r5]
27 0x05,0x80,0x54,0xe6 = ldrb r8, [r4], -r5
31 0x08,0x20,0x78,0xe4 = ldrbt r2, [r8], #-8
32 0x06,0x80,0xf7,0xe6 = ldrbt r8, [r7], r6
38 0xd0,0x00,0xc8,0xe0 = ldrd r0, r1, [r8], #0
[all …]
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| /external/u-boot/arch/arm/mach-davinci/ |
| D | lowlevel_init.S | 48 ldr r8, PSC_GEM_FLAG_CLEAR
51 and r7, r7, r8
103 ldr r8, [r6]
104 and r8, r8, r7
106 orr r8, r8, r9
107 str r8, [r6]
111 and r8, r8, r7
112 str r8, [r6]
116 and r8, r8, r7
117 str r8, [r6]
[all …]
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| /external/libxaac/decoder/armv7/ |
| D | ixheaacd_tns_ar_filter_fixed.s | 40 MOV r8, #0
45 STR r8, [r14, #4]! @lpc[i] = 0
49 STR r8, [r14, #4] @lpc[i] = 0
61 LDR r8 , [r0] @r8 =*spectrum
63 MOV r8, r8, lsl r1
64 MOV r9, r8, asr r1
65 MOV r8 , r8 , lsl r6
66 STR r8 , [r12] @state[0] = sp[top]
70 LDR r8 , [r0] @r8 =*spectrum
85 MOV r8, r8, lsl r1
[all …]
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| D | ixheaacd_tns_ar_filter_fixed_32x16.s | 40 MOV r8, #0
45 STRH r8, [r14, #2]!
49 STRH r8, [r14, #2]
64 LDR r8 , [r0]
66 MOV r8, r8, lsl r1
67 MOV r9, r8, asr r1
68 MOV r8 , r8 , lsl r6
69 STR r8 , [r12], #-4
74 LDR r8 , [r0]
86 MOV r8, r8, lsl r1
[all …]
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| D | ixheaacd_esbr_radix4bfly.s | 53 LDR r8, [r2, r3, lsl #2]
56 ADD r10, r6, r8
57 SUB r11, r6, r8
65 LDR r8, [r1]
70 ADD r12, r8, r9
71 SUB r8, r8, r9
81 ADD r11, r8, r14
84 SUB r6, r8, r14
87 SMULL r14, r8, r10, r5
88 SMLAL r14, r8, r11, r4
[all …]
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| D | ixheaacd_radix4_bfly.s | 55 LDR r8, [r2, r3, lsl #2]
58 ADD r10, r6, r8
59 SUB r11, r6, r8
67 LDR r8, [r1]
72 ADD r12, r8, r9
73 SUB r8, r8, r9
83 ADD r11, r8, r14
85 SUB r6, r8, r14
88 SMULWT r8, r11, r5
91 SUB r8, r8, r14
[all …]
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| D | ixheaacd_decorr_filter2.s | 60 LDR r8, [r0]
70 MLA r0, r7, r0, r8
141 LDR r8, [r11], #4
144 SMULBT r3, r7, r8
145 SMULBB r9, r7, r8
150 SMULTT r10, r7, r8
154 SMLATB r3, r7, r8, r3
156 MOV r8, #0x8000
160 QADD r14, r14, r8
163 QADD r1, r10, r8
[all …]
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| /external/skqp/src/compute/hs/cuda/sm_35/u64/ |
| D | hs_cuda_u64.cu | 37 HS_KEY_TYPE r8 = HS_SLAB_GLOBAL_LOAD(vin, 7); variable
41 HS_CMP_XCHG(r4, r8);
45 HS_CMP_XCHG(r6, r8);
51 HS_CMP_XCHG(r7, r8);
59 HS_CMP_FLIP(0, r1, r8);
69 HS_CMP_XCHG(r4, r8);
71 HS_CMP_XCHG(r6, r8);
75 HS_CMP_XCHG(r7, r8);
78 HS_CMP_FLIP(0, r1, r8);
92 HS_CMP_HALF(7, r8);
[all …]
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| /external/skia/src/compute/hs/cuda/sm_35/u64/ |
| D | hs_cuda_u64.cu | 37 HS_KEY_TYPE r8 = HS_SLAB_GLOBAL_LOAD(vin, 7); variable
41 HS_CMP_XCHG(r4, r8);
45 HS_CMP_XCHG(r6, r8);
51 HS_CMP_XCHG(r7, r8);
59 HS_CMP_FLIP(0, r1, r8);
69 HS_CMP_XCHG(r4, r8);
71 HS_CMP_XCHG(r6, r8);
75 HS_CMP_XCHG(r7, r8);
78 HS_CMP_FLIP(0, r1, r8);
92 HS_CMP_HALF(7, r8);
[all …]
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| /external/swiftshader/third_party/LLVM/test/MC/ARM/ |
| D | basic-thumb2-instructions.s | 24 adc r8, r12, #0xaa00aa00
34 @ CHECK: adc r8, r12, #2852170240 @ encoding: [0x4c,0xf1,0xaa,0x28]
70 add r2, r8, #0xff00
82 @ CHECK: add.w r2, r8, #65280 @ encoding: [0x08,0xf5,0x7f,0x42]
93 add r1, r2, r8
97 add.w r4, r8, r1, ror #12
99 @ CHECK: add.w r1, r2, r8 @ encoding: [0x02,0xeb,0x08,0x01]
103 @ CHECK: add.w r4, r8, r1, ror #12 @ encoding: [0x08,0xeb,0x31,0x34]
133 and r4, r9, r8
134 and r1, r4, r8, asr #3
[all …]
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| /external/libhevc/common/arm/ |
| D | ihevc_intra_pred_luma_mode_18_34.s | 132 mov r8,r0
136 vld1.8 {d0},[r8],r6
138 vld1.8 {d1},[r8],r6
140 vld1.8 {d2},[r8],r6
141 vld1.8 {d3},[r8],r6
143 vld1.8 {d4},[r8],r6
144 vld1.8 {d5},[r8],r6
145 vld1.8 {d6},[r8],r6
147 vld1.8 {d7},[r8],r6
155 movne r8,r0
[all …]
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| D | ihevc_sao_edge_offset_class3.s | 59 @r8=> ht
93 LDR r8,[sp,#ht_offset] @Loads ht
107 SUB r10,r8,#1 @ht-1
156 SUB r11,r8,#1 @ht - 1
199 MOV r12,r8 @Move ht
229 CMP r8,#4 @Compare ht with 4
237 LDRBEQ r8,[r5] @pu1_avail[0]
238 MOVNE r8,#-1
239 VMOV.8 d8[0],r8 @au1_mask = vsetq_lane_s8(-1, au1_mask, 0)
243 LDRB r8,[r5,#1] @pu1_avail[1]
[all …]
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| /external/skqp/src/compute/hs/cl/intel/gen8/u32/ |
| D | hs_kernels.cl | 28 HS_KEY_TYPE r8 = HS_SLAB_GLOBAL_LOAD(vin, 7);
32 HS_CMP_XCHG(r4, r8);
36 HS_CMP_XCHG(r6, r8);
42 HS_CMP_XCHG(r7, r8);
50 HS_CMP_FLIP(0, r1, r8);
60 HS_CMP_XCHG(r4, r8);
62 HS_CMP_XCHG(r6, r8);
66 HS_CMP_XCHG(r7, r8);
69 HS_CMP_FLIP(0, r1, r8);
83 HS_CMP_HALF(7, r8);
[all …]
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| /external/skia/src/compute/hs/cl/intel/gen8/u32/ |
| D | hs_kernels.cl | 28 HS_KEY_TYPE r8 = HS_SLAB_GLOBAL_LOAD(vin, 7);
32 HS_CMP_XCHG(r4, r8);
36 HS_CMP_XCHG(r6, r8);
42 HS_CMP_XCHG(r7, r8);
50 HS_CMP_FLIP(0, r1, r8);
60 HS_CMP_XCHG(r4, r8);
62 HS_CMP_XCHG(r6, r8);
66 HS_CMP_XCHG(r7, r8);
69 HS_CMP_FLIP(0, r1, r8);
83 HS_CMP_HALF(7, r8);
[all …]
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| /external/u-boot/arch/arm/lib/ |
| D | memset.S | 38 stmfd sp!, {r8, lr}
39 mov r8, r1
43 stmiage ip!, {r1, r3, r8, lr} @ 64 bytes at a time.
44 stmiage ip!, {r1, r3, r8, lr}
45 stmiage ip!, {r1, r3, r8, lr}
46 stmiage ip!, {r1, r3, r8, lr}
48 ldmfdeq sp!, {r8, pc} @ Now <64 bytes to go.
53 stmiane ip!, {r1, r3, r8, lr}
54 stmiane ip!, {r1, r3, r8, lr}
56 stmiane ip!, {r1, r3, r8, lr}
[all …]
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| /external/boringssl/ios-arm/crypto/chacha/ |
| D | chacha-armv4.S | 83 ldmia r3,{r4,r5,r6,r7,r8,r9,r10,r11} @ load key
85 stmdb sp!,{r4,r5,r6,r7,r8,r9,r10,r11} @ copy key
93 ldmia sp,{r0,r1,r2,r3,r4,r5,r6,r7,r8,r9} @ load key material
115 add r8,r8,r12
119 eor r4,r4,r8,ror#20
127 add r8,r8,r12
133 eor r4,r4,r8,ror#25
135 str r8,[sp,#4*(16+8)]
136 ldr r8,[sp,#4*(16+10)]
145 add r8,r8,r14
[all …]
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| /external/boringssl/linux-arm/crypto/chacha/ |
| D | chacha-armv4.S | 82 ldmia r3,{r4,r5,r6,r7,r8,r9,r10,r11} @ load key
84 stmdb sp!,{r4,r5,r6,r7,r8,r9,r10,r11} @ copy key
92 ldmia sp,{r0,r1,r2,r3,r4,r5,r6,r7,r8,r9} @ load key material
114 add r8,r8,r12
118 eor r4,r4,r8,ror#20
126 add r8,r8,r12
132 eor r4,r4,r8,ror#25
134 str r8,[sp,#4*(16+8)]
135 ldr r8,[sp,#4*(16+10)]
144 add r8,r8,r14
[all …]
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| /external/vixl/test/aarch32/ |
| D | test-assembler-rd-rn-rm-t32.cc | 109 {{r13, r6, r8}, false, al, "r13 r6 r8", "r13_r6_r8"},
110 {{r9, r1, r8}, false, al, "r9 r1 r8", "r9_r1_r8"},
111 {{r3, r8, r8}, false, al, "r3 r8 r8", "r3_r8_r8"},
122 {{r12, r8, r4}, false, al, "r12 r8 r4", "r12_r8_r4"},
123 {{r11, r8, r9}, false, al, "r11 r8 r9", "r11_r8_r9"},
126 {{r9, r8, r13}, false, al, "r9 r8 r13", "r9_r8_r13"},
132 {{r8, r11, r0}, false, al, "r8 r11 r0", "r8_r11_r0"},
135 {{r8, r12, r13}, false, al, "r8 r12 r13", "r8_r12_r13"},
138 {{r8, r14, r5}, false, al, "r8 r14 r5", "r8_r14_r5"},
141 {{r8, r7, r14}, false, al, "r8 r7 r14", "r8_r7_r14"},
[all …]
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| D | test-assembler-rd-rn-rm-a32.cc | 109 {{r13, r6, r8}, false, al, "r13 r6 r8", "r13_r6_r8"},
110 {{r9, r1, r8}, false, al, "r9 r1 r8", "r9_r1_r8"},
111 {{r3, r8, r8}, false, al, "r3 r8 r8", "r3_r8_r8"},
122 {{r12, r8, r4}, false, al, "r12 r8 r4", "r12_r8_r4"},
123 {{r11, r8, r9}, false, al, "r11 r8 r9", "r11_r8_r9"},
126 {{r9, r8, r13}, false, al, "r9 r8 r13", "r9_r8_r13"},
132 {{r8, r11, r0}, false, al, "r8 r11 r0", "r8_r11_r0"},
135 {{r8, r12, r13}, false, al, "r8 r12 r13", "r8_r12_r13"},
138 {{r8, r14, r5}, false, al, "r8 r14 r5", "r8_r14_r5"},
141 {{r8, r7, r14}, false, al, "r8 r7 r14", "r8_r7_r14"},
[all …]
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| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/ARM/ |
| D | thumb2-narrow-dp.ll | 8 // - Rd, Rn and Rm are < r8
12 // - Rd, Rn and Rm are < r8
21 ADDS r8, r8, #8 // T3
22 // CHECK: adds.w r8, r8, #8 @ encoding: [0x18,0xf1,0x08,0x08]
114 ANDS r8, r1, r8 // high registers so must use wide encoding
115 ANDS r8, r8, r1
116 ANDS r0, r8, r0
117 ANDS r1, r1, r8
128 // CHECK: ands.w r8, r1, r8 @ encoding: [0x11,0xea,0x08,0x08]
129 // CHECK: ands.w r8, r8, r1 @ encoding: [0x18,0xea,0x01,0x08]
[all …]
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| D | basic-arm-instructions.s | 21 adc r7, r8, #(0xff << 16)
22 adc r7, r8, #-2147483638
23 adc r7, r8, #42, #2
24 adc r7, r8, #40, #2
25 adc r7, r8, $40, $2
26 adc r7, r8, 40, 2
27 adc r7, r8, (2 * 20), (1 << 1)
37 adcs r7, r8, #40, #2
44 @ CHECK: adc r7, r8, #16711680 @ encoding: [0xff,0x78,0xa8,0xe2]
45 @ CHECK: adc r7, r8, #-2147483638 @ encoding: [0x2a,0x71,0xa8,0xe2]
[all …]
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| /external/llvm/test/MC/ARM/ |
| D | thumb2-narrow-dp.ll | 8 // - Rd, Rn and Rm are < r8
12 // - Rd, Rn and Rm are < r8
21 ADDS r8, r8, #8 // T3
22 // CHECK: adds.w r8, r8, #8 @ encoding: [0x18,0xf1,0x08,0x08]
114 ANDS r8, r1, r8 // high registers so must use wide encoding
115 ANDS r8, r8, r1
116 ANDS r0, r8, r0
117 ANDS r1, r1, r8
128 // CHECK: ands.w r8, r1, r8 @ encoding: [0x11,0xea,0x08,0x08]
129 // CHECK: ands.w r8, r8, r1 @ encoding: [0x18,0xea,0x01,0x08]
[all …]
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| D | basic-arm-instructions.s | 21 adc r7, r8, #(0xff << 16)
22 adc r7, r8, #-2147483638
23 adc r7, r8, #42, #2
24 adc r7, r8, #40, #2
25 adc r7, r8, $40, $2
26 adc r7, r8, 40, 2
27 adc r7, r8, (2 * 20), (1 << 1)
37 adcs r7, r8, #40, #2
44 @ CHECK: adc r7, r8, #16711680 @ encoding: [0xff,0x78,0xa8,0xe2]
45 @ CHECK: adc r7, r8, #-2147483638 @ encoding: [0x2a,0x71,0xa8,0xe2]
[all …]
|