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Searched refs:rad_info (Results 1 – 14 of 14) sorted by relevance

/external/mesa3d/src/amd/vulkan/
Dsi_cmd_buffer.c44 unsigned sh_per_se = MAX2(physical_device->rad_info.max_sh_per_se, 1); in si_write_harvested_raster_configs()
45 unsigned num_se = MAX2(physical_device->rad_info.max_se, 1); in si_write_harvested_raster_configs()
46 unsigned rb_mask = physical_device->rad_info.enabled_rb_mask; in si_write_harvested_raster_configs()
47 unsigned num_rb = MIN2(physical_device->rad_info.num_render_backends, 16); in si_write_harvested_raster_configs()
149 if (physical_device->rad_info.chip_class < CIK) in si_write_harvested_raster_configs()
159 if (physical_device->rad_info.chip_class >= CIK) in si_write_harvested_raster_configs()
164 if (physical_device->rad_info.chip_class < CIK) in si_write_harvested_raster_configs()
191 if (physical_device->rad_info.chip_class >= CIK) { in si_emit_compute()
206 if (physical_device->rad_info.chip_class <= SI) { in si_emit_compute()
233 unsigned num_rb = MIN2(physical_device->rad_info.num_render_backends, 16); in si_set_raster_config()
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Dradv_device.c121 uint64_t visible_vram_size = MIN2(device->rad_info.vram_size, in radv_physical_device_init_mem_types()
122 device->rad_info.vram_vis_size); in radv_physical_device_init_mem_types()
126 if (device->rad_info.vram_size - visible_vram_size > 0) { in radv_physical_device_init_mem_types()
129 .size = device->rad_info.vram_size - visible_vram_size, in radv_physical_device_init_mem_types()
140 if (device->rad_info.gart_size > 0) { in radv_physical_device_init_mem_types()
143 .size = device->rad_info.gart_size, in radv_physical_device_init_mem_types()
144 .flags = device->rad_info.has_dedicated_vram ? 0 : VK_MEMORY_HEAP_DEVICE_LOCAL_BIT, in radv_physical_device_init_mem_types()
162 (device->rad_info.has_dedicated_vram ? 0 : VK_MEMORY_PROPERTY_DEVICE_LOCAL_BIT), in radv_physical_device_init_mem_types()
181 (device->rad_info.has_dedicated_vram ? 0 : VK_MEMORY_PROPERTY_DEVICE_LOCAL_BIT), in radv_physical_device_init_mem_types()
229 device->ws->query_info(device->ws, &device->rad_info); in radv_physical_device_init()
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Dradv_image.c50 && device->physical_device->rad_info.chip_class <= VI) { in radv_choose_tiling()
117 device->physical_device->rad_info.chip_class >= VI && in radv_init_surface()
121 (device->physical_device->rad_info.chip_class >= GFX9 && in radv_init_surface()
157 device->physical_device->rad_info.chip_class < VI || in radv_init_surface()
168 return (ATI_VENDOR_ID << 16) | device->physical_device->rad_info.pci_id; in si_get_bo_metadata_word1()
224 if (device->physical_device->rad_info.chip_class != VI && stride) { in radv_make_buffer_descriptor()
247 enum chip_class chip_class = device->physical_device->rad_info.chip_class; in si_set_mutable_tex_desc_fields()
421 if (device->physical_device->rad_info.chip_class >= GFX9 && in si_make_texture_descriptor()
430 is_storage_image, device->physical_device->rad_info.chip_class >= GFX9); in si_make_texture_descriptor()
462 if (device->physical_device->rad_info.chip_class >= GFX9) { in si_make_texture_descriptor()
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Dradv_pipeline.c119 4 * device->physical_device->rad_info.num_good_compute_units * in radv_pipeline_scratch_init()
819 unsigned num_tile_pipes = pipeline->device->physical_device->rad_info.num_tile_pipes; in radv_pipeline_init_multisample_state()
848 …_0 = S_028A48_ALTERNATE_RBS_PER_TILE(pipeline->device->physical_device->rad_info.chip_class >= GFX… in radv_pipeline_init_multisample_state()
1307 unsigned num_se = device->physical_device->rad_info.max_se; in calculate_gs_ring_sizes()
1316 if (pipeline->device->physical_device->rad_info.chip_class >= GFX9) in calculate_gs_ring_sizes()
1336 if (pipeline->device->physical_device->rad_info.chip_class <= VI) in calculate_gs_ring_sizes()
1350 if (device->physical_device->rad_info.family == CHIP_BONAIRE || in si_multiwave_lds_size_workaround()
1351 device->physical_device->rad_info.family == CHIP_KABINI || in si_multiwave_lds_size_workaround()
1352 device->physical_device->rad_info.family == CHIP_MULLINS) in si_multiwave_lds_size_workaround()
1416 hardware_lds_size = pipeline->device->physical_device->rad_info.chip_class >= CIK ? 65536 : 32768; in calculate_tess_state()
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Dradv_shader.c125 device->rad_info.chip_class <= VI; in radv_lower_indirect_derefs()
394 if (device->physical_device->rad_info.chip_class >= GFX9) in radv_fill_shader_variant()
422 if (device->physical_device->rad_info.chip_class >= GFX9 && in radv_fill_shader_variant()
451 } else if (device->physical_device->rad_info.chip_class >= GFX9 && in radv_fill_shader_variant()
472 enum radeon_family chip_family = device->physical_device->rad_info.family; in shader_variant_create()
484 options->chip_class = device->physical_device->rad_info.chip_class; in shader_variant_create()
605 if (device->physical_device->rad_info.chip_class >= VI) in get_total_sgprs()
617 unsigned lds_increment = device->physical_device->rad_info.chip_class >= CIK ? 512 : 256; in generate_shader_stats()
622 switch (device->physical_device->rad_info.family) { in generate_shader_stats()
717 unsigned lds_multiplier = device->physical_device->rad_info.chip_class >= CIK ? 512 : 256; in radv_GetShaderInfoAMD()
Dradv_meta_bufimage.c135 if (device->physical_device->rad_info.chip_class >= GFX9) in radv_device_init_meta_itob_state()
211 if (device->physical_device->rad_info.chip_class >= GFX9) { in radv_device_init_meta_itob_state()
256 if (device->physical_device->rad_info.chip_class >= GFX9) in radv_device_finish_meta_itob_state()
359 if (device->physical_device->rad_info.chip_class >= GFX9) in radv_device_init_meta_btoi_state()
434 if (device->physical_device->rad_info.chip_class >= GFX9) { in radv_device_init_meta_btoi_state()
573 if (device->physical_device->rad_info.chip_class >= GFX9) in radv_device_init_meta_itoi_state()
648 if (device->physical_device->rad_info.chip_class >= GFX9) { in radv_device_init_meta_itoi_state()
692 if (device->physical_device->rad_info.chip_class >= GFX9) in radv_device_finish_meta_itoi_state()
768 if (device->physical_device->rad_info.chip_class >= GFX9) in radv_device_init_meta_cleari_state()
838 if (device->physical_device->rad_info.chip_class >= GFX9) { in radv_device_init_meta_cleari_state()
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Dradv_debug.c75 ac_vm_fault_occured(device->physical_device->rad_info.chip_class, in radv_init_trace()
104 ac_dump_reg(f, device->physical_device->rad_info.chip_class, in radv_dump_mmapped_reg()
111 struct radeon_info *info = &device->physical_device->rad_info; in radv_dump_debug_registers()
317 enum chip_class chip_class = device->physical_device->rad_info.chip_class; in radv_dump_descriptors()
623 struct radeon_info *info = &device->physical_device->rad_info; in radv_dump_device_name()
670 vm_fault_occurred = ac_vm_fault_occured(device->physical_device->rad_info.chip_class, in radv_check_gpu_hangs()
Dradv_cmd_buffer.c188 cmd_buffer->device->physical_device->rad_info.chip_class >= CIK; in radv_cmd_buffer_uses_mec()
298 if (cmd_buffer->device->physical_device->rad_info.chip_class >= GFX9) { in radv_reset_cmd_buffer()
442 cmd_buffer->device->physical_device->rad_info.chip_class, in radv_cmd_buffer_after_draw()
675 if (cmd_buffer->device->physical_device->rad_info.chip_class >= CIK) in radv_emit_prefetch_TC_L2_async()
754 if (cmd_buffer->device->physical_device->rad_info.chip_class <= VI) in radv_emit_hw_vs()
785 if (cmd_buffer->device->physical_device->rad_info.chip_class == CIK && in radv_emit_hw_ls()
786 cmd_buffer->device->physical_device->rad_info.family != CHIP_HAWAII) in radv_emit_hw_ls()
800 if (cmd_buffer->device->physical_device->rad_info.chip_class >= GFX9) { in radv_emit_hw_hs()
864 if (cmd_buffer->device->physical_device->rad_info.chip_class >= CIK) in radv_emit_tess_shaders()
948 if (cmd_buffer->device->physical_device->rad_info.chip_class >= GFX9) { in radv_emit_geometry_shader()
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Dradv_query.c44 unsigned num_db = device->physical_device->rad_info.num_render_backends; in get_max_db()
45 MAYBE_UNUSED unsigned rb_mask = device->physical_device->rad_info.enabled_rb_mask; in get_max_db()
1172 cmd_buffer->device->physical_device->rad_info.chip_class, in radv_CmdEndQuery()
1222 cmd_buffer->device->physical_device->rad_info.chip_class, in radv_CmdWriteTimestamp()
1228 cmd_buffer->device->physical_device->rad_info.chip_class, in radv_CmdWriteTimestamp()
Dradv_pipeline_cache.c456 if (header.device_id != device->physical_device->rad_info.pci_id) in radv_pipeline_cache_load()
563 header->device_id = device->physical_device->rad_info.pci_id; in radv_GetPipelineCacheData()
Dradv_meta_blit2d.c45 …VkImageViewType view_type = cmd_buffer->device->physical_device->rad_info.chip_class < GFX9 ? VK_I… in create_iview()
356 bool use_3d = cmd_buffer->device->physical_device->rad_info.chip_class >= GFX9 && in radv_meta_blit2d()
1226 bool create_3d = device->physical_device->rad_info.chip_class >= GFX9; in radv_device_init_meta_blit2d_state()
Dradv_formats.c582 if (physical_device->rad_info.chip_class >= GFX9) in radv_physical_device_get_format_properties()
Dradv_private.h267 struct radeon_info rad_info; member
Dradv_meta_clear.c999 cmd_buffer->device->physical_device->rad_info.family == CHIP_STONEY) in emit_fast_color_clear()