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Searched refs:radeon_set_context_reg_seq (Results 1 – 17 of 17) sorted by relevance

/external/mesa3d/src/gallium/drivers/r600/
Dr600_viewport.c226 radeon_set_context_reg_seq(cs, CM_R_028BE8_PA_CL_GB_VERT_CLIP_ADJ, 4); in r600_emit_guardband()
228 radeon_set_context_reg_seq(cs, R600_R_028C0C_PA_CL_GB_VERT_CLIP_ADJ, 4); in r600_emit_guardband()
252 radeon_set_context_reg_seq(cs, R_028250_PA_SC_VPORT_SCISSOR_0_TL, 2); in r600_emit_scissors()
270 radeon_set_context_reg_seq(cs, R_028250_PA_SC_VPORT_SCISSOR_0_TL + in r600_emit_scissors()
330 radeon_set_context_reg_seq(cs, R_02843C_PA_CL_VPORT_XSCALE, 6); in r600_emit_viewports()
341 radeon_set_context_reg_seq(cs, R_02843C_PA_CL_VPORT_XSCALE + in r600_emit_viewports()
363 radeon_set_context_reg_seq(cs, R_0282D0_PA_SC_VPORT_ZMIN_0, 2); in r600_emit_depth_ranges()
375 radeon_set_context_reg_seq(cs, R_0282D0_PA_SC_VPORT_ZMIN_0 + in r600_emit_depth_ranges()
Dcayman_msaa.c167 radeon_set_context_reg_seq(cs, CM_R_028BF8_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_0, 14); in cayman_emit_msaa_sample_locs()
184 radeon_set_context_reg_seq(cs, CM_R_028BF8_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_0, 16); in cayman_emit_msaa_sample_locs()
233 radeon_set_context_reg_seq(cs, CM_R_028BDC_PA_SC_LINE_CNTL, 2); in cayman_emit_msaa_config()
260 radeon_set_context_reg_seq(cs, CM_R_028BDC_PA_SC_LINE_CNTL, 2); in cayman_emit_msaa_config()
Dr600_cs.h145 static inline void radeon_set_context_reg_seq(struct radeon_winsys_cs *cs, unsigned reg, unsigned n… in radeon_set_context_reg_seq() function
155 radeon_set_context_reg_seq(cs, reg, 1); in radeon_set_context_reg()
Dr600_state.c274 radeon_set_context_reg_seq(cs, R_028E00_PA_SU_POLY_OFFSET_FRONT_SCALE, 4); in r600_emit_polygon_offset()
797 radeon_set_context_reg_seq(cs, R_028E20_PA_CL_UCP0_X, 6*4); in r600_emit_clip_state()
1307 radeon_set_context_reg_seq(cs, R_028C1C_PA_SC_AA_SAMPLE_LOCS_MCTX, 2); in r600_emit_msaa_state()
1313 radeon_set_context_reg_seq(cs, R_028C1C_PA_SC_AA_SAMPLE_LOCS_MCTX, 2); in r600_emit_msaa_state()
1319 radeon_set_context_reg_seq(cs, R_028C1C_PA_SC_AA_SAMPLE_LOCS_MCTX, 2); in r600_emit_msaa_state()
1325 radeon_set_context_reg_seq(cs, R_028C1C_PA_SC_AA_SAMPLE_LOCS_MCTX, 2); in r600_emit_msaa_state()
1334 radeon_set_context_reg_seq(cs, R_028C00_PA_SC_LINE_CNTL, 2); in r600_emit_msaa_state()
1340 radeon_set_context_reg_seq(cs, R_028C00_PA_SC_LINE_CNTL, 2); in r600_emit_msaa_state()
1355 radeon_set_context_reg_seq(cs, R_0280A0_CB_COLOR0_INFO, 8); in r600_emit_framebuffer_state()
1415 radeon_set_context_reg_seq(cs, R_028060_CB_COLOR0_SIZE, nr_cbufs); in r600_emit_framebuffer_state()
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Devergreen_state.c996 radeon_set_context_reg_seq(cs, R_0285BC_PA_CL_UCP0_X, 6*4); in evergreen_emit_clip_state()
1653 radeon_set_context_reg_seq(cs, R_028C1C_PA_SC_AA_SAMPLE_LOCS_0, ARRAY_SIZE(eg_sample_locs_2x)); in evergreen_emit_msaa_state()
1658 radeon_set_context_reg_seq(cs, R_028C1C_PA_SC_AA_SAMPLE_LOCS_0, ARRAY_SIZE(eg_sample_locs_4x)); in evergreen_emit_msaa_state()
1663 radeon_set_context_reg_seq(cs, R_028C1C_PA_SC_AA_SAMPLE_LOCS_0, ARRAY_SIZE(sample_locs_8x)); in evergreen_emit_msaa_state()
1670 radeon_set_context_reg_seq(cs, R_028C00_PA_SC_LINE_CNTL, 2); in evergreen_emit_msaa_state()
1680 radeon_set_context_reg_seq(cs, R_028C00_PA_SC_LINE_CNTL, 2); in evergreen_emit_msaa_state()
1730 radeon_set_context_reg_seq(cs, R_028C60_CB_COLOR0_BASE + idx * 0x3C, 13); in evergreen_emit_image_state()
1861 radeon_set_context_reg_seq(cs, R_028C60_CB_COLOR0_BASE + i * 0x3C, 13); in evergreen_emit_framebuffer_state()
1914 radeon_set_context_reg_seq(cs, R_028040_DB_Z_INFO, 8); in evergreen_emit_framebuffer_state()
1938 radeon_set_context_reg_seq(cs, R_028040_DB_Z_INFO, 2); in evergreen_emit_framebuffer_state()
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Dr600_streamout.c200 radeon_set_context_reg_seq(cs, R_028AD0_VGT_STRMOUT_BUFFER_SIZE_0 + 16*i, 3); in r600_emit_streamout_begin()
Dr600_pipe.h968 radeon_set_context_reg_seq(cs, reg, num); in radeon_compute_set_context_reg_seq()
Dr600_state_common.c247 radeon_set_context_reg_seq(cs, R_028414_CB_BLEND_RED, 4); in r600_emit_blend_color()
260 radeon_set_context_reg_seq(cs, R_028408_VGT_INDX_OFFSET, 2); in r600_emit_vgt_state()
293 radeon_set_context_reg_seq(cs, R_028430_DB_STENCILREFMASK, 2); in r600_emit_stencil_ref()
/external/mesa3d/src/gallium/drivers/radeonsi/
Dsi_state_viewport.c206 radeon_set_context_reg_seq(cs, R_028BE8_PA_CL_GB_VERT_CLIP_ADJ, 4); in si_emit_guardband()
234 radeon_set_context_reg_seq(cs, R_028250_PA_SC_VPORT_SCISSOR_0_TL, 2); in si_emit_scissors()
252 radeon_set_context_reg_seq(cs, R_028250_PA_SC_VPORT_SCISSOR_0_TL + in si_emit_scissors()
312 radeon_set_context_reg_seq(cs, R_02843C_PA_CL_VPORT_XSCALE, 6); in si_emit_viewports()
323 radeon_set_context_reg_seq(cs, R_02843C_PA_CL_VPORT_XSCALE + in si_emit_viewports()
363 radeon_set_context_reg_seq(cs, R_0282D0_PA_SC_VPORT_ZMIN_0, 2); in si_emit_depth_ranges()
375 radeon_set_context_reg_seq(cs, R_0282D0_PA_SC_VPORT_ZMIN_0 + in si_emit_depth_ranges()
Dsi_state_msaa.c152 radeon_set_context_reg_seq(cs, R_028BF8_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_0, 14); in si_emit_sample_locations()
169 radeon_set_context_reg_seq(cs, R_028BF8_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_0, 16); in si_emit_sample_locations()
Dsi_state.c265 radeon_set_context_reg_seq(cs, R_028754_SX_PS_DOWNCONVERT, 3); in si_emit_cb_render_state()
270 radeon_set_context_reg_seq(cs, R_028754_SX_PS_DOWNCONVERT, 3); in si_emit_cb_render_state()
729 radeon_set_context_reg_seq(cs, R_028414_CB_BLEND_RED, 4); in si_emit_blend_color()
763 radeon_set_context_reg_seq(cs, R_0285BC_PA_CL_UCP_0_X, 6*4); in si_emit_clip_state()
1087 radeon_set_context_reg_seq(cs, R_028430_DB_STENCILREFMASK, 2); in si_emit_stencil_ref()
1380 radeon_set_context_reg_seq(cs, R_028000_DB_RENDER_CONTROL, 2); in si_emit_db_render_state()
3046 radeon_set_context_reg_seq(cs, R_028C60_CB_COLOR0_BASE + i * 0x3C, 15); in si_emit_framebuffer_state()
3104 radeon_set_context_reg_seq(cs, R_028C60_CB_COLOR0_BASE + i * 0x3C, in si_emit_framebuffer_state()
3140 radeon_set_context_reg_seq(cs, R_028014_DB_HTILE_DATA_BASE, 3); in si_emit_framebuffer_state()
3145 radeon_set_context_reg_seq(cs, R_028038_DB_Z_INFO, 10); in si_emit_framebuffer_state()
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Dsi_state_streamout.c277 radeon_set_context_reg_seq(cs, R_028AD0_VGT_STRMOUT_BUFFER_SIZE_0 + 16*i, 2); in si_emit_streamout_begin()
366 radeon_set_context_reg_seq(sctx->b.gfx.cs, R_028B94_VGT_STRMOUT_CONFIG, 2); in si_emit_streamout_enable()
Dsi_state_shaders.c2609 radeon_set_context_reg_seq(cs, R_028644_SPI_PS_INPUT_CNTL_0, num_interp); in si_emit_spi_map()
/external/mesa3d/src/amd/vulkan/
Dradv_cs.h57 static inline void radeon_set_context_reg_seq(struct radeon_winsys_cs *cs, unsigned reg, unsigned n… in radeon_set_context_reg_seq() function
68 radeon_set_context_reg_seq(cs, reg, 1); in radeon_set_context_reg()
Dsi_cmd_buffer.c530 radeon_set_context_reg_seq(cs, R_028A00_PA_SU_POINT_SIZE, 1); in si_emit_config()
532 radeon_set_context_reg_seq(cs, R_028A04_PA_SU_POINT_MINMAX, 1); in si_emit_config()
617 radeon_set_context_reg_seq(cs, R_02843C_PA_CL_VPORT_XSCALE + in si_write_viewport()
633 radeon_set_context_reg_seq(cs, R_0282D0_PA_SC_VPORT_ZMIN_0 + in si_write_viewport()
680 radeon_set_context_reg_seq(cs, R_028250_PA_SC_VPORT_SCISSOR_0_TL + first * 4 * 2, count * 2); in si_write_scissors()
708 radeon_set_context_reg_seq(cs, R_028BE8_PA_CL_GB_VERT_CLIP_ADJ, 4); in si_write_scissors()
1495 radeon_set_context_reg_seq(cs, R_028BF8_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_0, 14); in radv_cayman_emit_msaa_sample_locs()
1512 radeon_set_context_reg_seq(cs, R_028BF8_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_0, 16); in radv_cayman_emit_msaa_sample_locs()
Dradv_cmd_buffer.c524 radeon_set_context_reg_seq(cmd_buffer->cs, R_028780_CB_BLEND0_CONTROL, 8); in radv_emit_graphics_blend_state()
532 radeon_set_context_reg_seq(cmd_buffer->cs, R_028760_SX_MRT0_BLEND_OPT, 8); in radv_emit_graphics_blend_state()
535 radeon_set_context_reg_seq(cmd_buffer->cs, R_028754_SX_PS_DOWNCONVERT, 3); in radv_emit_graphics_blend_state()
600 radeon_set_context_reg_seq(cmd_buffer->cs, R_028C38_PA_SC_AA_MASK_X0Y0_X1Y0, 2); in radv_update_multisample_state()
640 radeon_set_context_reg_seq(cmd_buffer->cs, R_028BDC_PA_SC_LINE_CNTL, 2); in radv_update_multisample_state()
922 radeon_set_context_reg_seq(cmd_buffer->cs, R_028A60_VGT_GSVS_RING_OFFSET_1, 3); in radv_emit_geometry_shader()
932 radeon_set_context_reg_seq(cmd_buffer->cs, R_028B5C_VGT_GS_VERT_ITEMSIZE, 4); in radv_emit_geometry_shader()
1034 …radeon_set_context_reg_seq(cmd_buffer->cs, R_028644_SPI_PS_INPUT_CNTL_0, pipeline->graphics.ps_inp… in radv_emit_fragment_shader()
1152 radeon_set_context_reg_seq(cmd_buffer->cs, R_028210_PA_SC_CLIPRECT_0_TL, in radv_emit_discard_rectangle()
1176 radeon_set_context_reg_seq(cmd_buffer->cs, R_028414_CB_BLEND_RED, 4); in radv_emit_blend_constants()
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/external/mesa3d/src/gallium/drivers/radeon/
Dr600_cs.h128 static inline void radeon_set_context_reg_seq(struct radeon_winsys_cs *cs, unsigned reg, unsigned n… in radeon_set_context_reg_seq() function
138 radeon_set_context_reg_seq(cs, reg, 1); in radeon_set_context_reg()