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Searched refs:radeon_winsys_cs (Results 1 – 25 of 68) sorted by relevance

123

/external/mesa3d/src/amd/vulkan/
Dradv_radeon_winsys.h97 struct radeon_winsys_cs { struct
226 struct radeon_winsys_cs *(*cs_create)(struct radeon_winsys *ws,
229 void (*cs_destroy)(struct radeon_winsys_cs *cs);
231 void (*cs_reset)(struct radeon_winsys_cs *cs);
233 bool (*cs_finalize)(struct radeon_winsys_cs *cs);
235 void (*cs_grow)(struct radeon_winsys_cs * cs, size_t min_size);
239 struct radeon_winsys_cs **cs_array,
241 struct radeon_winsys_cs *initial_preamble_cs,
242 struct radeon_winsys_cs *continue_preamble_cs,
247 void (*cs_add_buffer)(struct radeon_winsys_cs *cs,
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Dradv_cs.h34 struct radeon_winsys_cs *cs, in radeon_check_space()
42 static inline void radeon_set_config_reg_seq(struct radeon_winsys_cs *cs, unsigned reg, unsigned nu… in radeon_set_config_reg_seq()
51 static inline void radeon_set_config_reg(struct radeon_winsys_cs *cs, unsigned reg, unsigned value) in radeon_set_config_reg()
57 static inline void radeon_set_context_reg_seq(struct radeon_winsys_cs *cs, unsigned reg, unsigned n… in radeon_set_context_reg_seq()
66 static inline void radeon_set_context_reg(struct radeon_winsys_cs *cs, unsigned reg, unsigned value) in radeon_set_context_reg()
73 static inline void radeon_set_context_reg_idx(struct radeon_winsys_cs *cs, in radeon_set_context_reg_idx()
84 static inline void radeon_set_sh_reg_seq(struct radeon_winsys_cs *cs, unsigned reg, unsigned num) in radeon_set_sh_reg_seq()
93 static inline void radeon_set_sh_reg(struct radeon_winsys_cs *cs, unsigned reg, unsigned value) in radeon_set_sh_reg()
99 static inline void radeon_set_uconfig_reg_seq(struct radeon_winsys_cs *cs, unsigned reg, unsigned n… in radeon_set_uconfig_reg_seq()
108 static inline void radeon_set_uconfig_reg(struct radeon_winsys_cs *cs, unsigned reg, unsigned value) in radeon_set_uconfig_reg()
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Dsi_cmd_buffer.c40 struct radeon_winsys_cs *cs, in si_write_harvested_raster_configs()
177 struct radeon_winsys_cs *cs) in si_emit_compute()
231 struct radeon_winsys_cs *cs) in si_set_raster_config()
334 struct radeon_winsys_cs *cs) in si_emit_config()
554 struct radeon_winsys_cs *cs = device->ws->cs_create(device->ws, RING_GFX); in cik_create_gfx_config()
611 si_write_viewport(struct radeon_winsys_cs *cs, int first_vp, in si_write_viewport()
670 si_write_scissors(struct radeon_winsys_cs *cs, int first, in si_write_scissors()
827 void si_cs_emit_write_event_eop(struct radeon_winsys_cs *cs, in si_cs_emit_write_event_eop()
877 si_emit_wait_fence(struct radeon_winsys_cs *cs, in si_emit_wait_fence()
892 si_emit_acquire_mem(struct radeon_winsys_cs *cs, in si_emit_acquire_mem()
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Dradv_private.h576 struct radeon_winsys_cs *initial_preamble_cs;
577 struct radeon_winsys_cs *initial_full_flush_preamble_cs;
578 struct radeon_winsys_cs *continue_preamble_cs;
593 struct radeon_winsys_cs *empty_cs[RADV_MAX_QUEUE_FAMILIES];
965 struct radeon_winsys_cs *cs;
1008 void si_write_viewport(struct radeon_winsys_cs *cs, int first_vp,
1010 void si_write_scissors(struct radeon_winsys_cs *cs, int first,
1016 void si_cs_emit_write_event_eop(struct radeon_winsys_cs *cs,
1026 void si_emit_wait_fence(struct radeon_winsys_cs *cs,
1030 void si_cs_emit_cache_flush(struct radeon_winsys_cs *cs,
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Dradv_debug.h59 radv_check_gpu_hangs(struct radv_queue *queue, struct radeon_winsys_cs *cs);
/external/mesa3d/src/gallium/drivers/radeon/
Dradeon_winsys.h170 struct radeon_winsys_cs { struct
290 struct radeon_winsys_cs *cs,
453 struct radeon_winsys_cs *(*cs_create)(struct radeon_winsys_ctx *ctx,
464 void (*cs_destroy)(struct radeon_winsys_cs *cs);
477 unsigned (*cs_add_buffer)(struct radeon_winsys_cs *cs,
493 int (*cs_lookup_buffer)(struct radeon_winsys_cs *cs,
504 bool (*cs_validate)(struct radeon_winsys_cs *cs);
513 bool (*cs_check_space)(struct radeon_winsys_cs *cs, unsigned dw);
525 unsigned (*cs_get_buffer_list)(struct radeon_winsys_cs *cs,
538 int (*cs_flush)(struct radeon_winsys_cs *cs,
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Dr600_cs.h43 struct radeon_winsys_cs *cs, in radeon_cs_memory_below_limit()
114 static inline void radeon_set_config_reg_seq(struct radeon_winsys_cs *cs, unsigned reg, unsigned nu… in radeon_set_config_reg_seq()
122 static inline void radeon_set_config_reg(struct radeon_winsys_cs *cs, unsigned reg, unsigned value) in radeon_set_config_reg()
128 static inline void radeon_set_context_reg_seq(struct radeon_winsys_cs *cs, unsigned reg, unsigned n… in radeon_set_context_reg_seq()
136 static inline void radeon_set_context_reg(struct radeon_winsys_cs *cs, unsigned reg, unsigned value) in radeon_set_context_reg()
142 static inline void radeon_set_context_reg_idx(struct radeon_winsys_cs *cs, in radeon_set_context_reg_idx()
153 static inline void radeon_set_sh_reg_seq(struct radeon_winsys_cs *cs, unsigned reg, unsigned num) in radeon_set_sh_reg_seq()
161 static inline void radeon_set_sh_reg(struct radeon_winsys_cs *cs, unsigned reg, unsigned value) in radeon_set_sh_reg()
167 static inline void radeon_set_uconfig_reg_seq(struct radeon_winsys_cs *cs, unsigned reg, unsigned n… in radeon_set_uconfig_reg_seq()
175 static inline void radeon_set_uconfig_reg(struct radeon_winsys_cs *cs, unsigned reg, unsigned value) in radeon_set_uconfig_reg()
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Dr600_pipe_common.c51 struct radeon_winsys_cs *cs = ctx->gfx.cs; in si_gfx_write_event_eop()
147 struct radeon_winsys_cs *cs = ctx->gfx.cs; in si_gfx_wait_fence()
160 struct radeon_winsys_cs *cs = rctx->dma.cs; in r600_dma_emit_wait_idle()
247 struct radeon_winsys_cs *cs = rctx->dma.cs; in r600_flush_dma_ring()
281 void si_save_cs(struct radeon_winsys *ws, struct radeon_winsys_cs *cs, in si_save_cs()
/external/mesa3d/src/gallium/drivers/r600/
Dr600_cs.h45 struct radeon_winsys_cs *cs, in radeon_cs_memory_below_limit()
121 struct radeon_winsys_cs *cs = ring->cs; in r600_emit_reloc()
131 static inline void radeon_set_config_reg_seq(struct radeon_winsys_cs *cs, unsigned reg, unsigned nu… in radeon_set_config_reg_seq()
139 static inline void radeon_set_config_reg(struct radeon_winsys_cs *cs, unsigned reg, unsigned value) in radeon_set_config_reg()
145 static inline void radeon_set_context_reg_seq(struct radeon_winsys_cs *cs, unsigned reg, unsigned n… in radeon_set_context_reg_seq()
153 static inline void radeon_set_context_reg(struct radeon_winsys_cs *cs, unsigned reg, unsigned value) in radeon_set_context_reg()
159 static inline void radeon_set_context_reg_idx(struct radeon_winsys_cs *cs, in radeon_set_context_reg_idx()
170 static inline void radeon_set_sh_reg_seq(struct radeon_winsys_cs *cs, unsigned reg, unsigned num) in radeon_set_sh_reg_seq()
178 static inline void radeon_set_sh_reg(struct radeon_winsys_cs *cs, unsigned reg, unsigned value) in radeon_set_sh_reg()
184 static inline void radeon_set_uconfig_reg_seq(struct radeon_winsys_cs *cs, unsigned reg, unsigned n… in radeon_set_uconfig_reg_seq()
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Dr600_viewport.c157 struct radeon_winsys_cs *cs, in r600_emit_one_scissor()
188 struct radeon_winsys_cs *cs = rctx->gfx.cs; in r600_emit_guardband()
238 struct radeon_winsys_cs *cs = rctx->gfx.cs; in r600_emit_scissors()
309 struct radeon_winsys_cs *cs = rctx->gfx.cs; in r600_emit_one_viewport()
321 struct radeon_winsys_cs *cs = rctx->gfx.cs; in r600_emit_viewports()
351 struct radeon_winsys_cs *cs = rctx->gfx.cs; in r600_emit_depth_ranges()
Dr600_pipe.h606 static inline void r600_emit_command_buffer(struct radeon_winsys_cs *cs, in r600_emit_command_buffer()
793 struct radeon_winsys_cs *cs,
796 struct radeon_winsys_cs *cs,
966 static inline void radeon_compute_set_context_reg_seq(struct radeon_winsys_cs *cs, unsigned reg, un… in radeon_compute_set_context_reg_seq()
973 static inline void radeon_set_ctl_const_seq(struct radeon_winsys_cs *cs, unsigned reg, unsigned num) in radeon_set_ctl_const_seq()
981 static inline void radeon_compute_set_context_reg(struct radeon_winsys_cs *cs, unsigned reg, unsign… in radeon_compute_set_context_reg()
987 static inline void radeon_set_context_reg_flag(struct radeon_winsys_cs *cs, unsigned reg, unsigned … in radeon_set_context_reg_flag()
996 static inline void radeon_set_ctl_const(struct radeon_winsys_cs *cs, unsigned reg, unsigned value) in radeon_set_ctl_const()
Devergreen_hw_context.c38 struct radeon_winsys_cs *cs = rctx->b.dma.cs; in evergreen_dma_copy_buffer()
90 struct radeon_winsys_cs *cs = rctx->b.gfx.cs; in evergreen_cp_dma_clear_buffer()
Dr600_hw_context.c91 struct radeon_winsys_cs *cs = rctx->b.gfx.cs; in r600_flush_emit()
255 struct radeon_winsys_cs *cs = ctx->b.gfx.cs; in r600_context_gfx_flush()
427 struct radeon_winsys_cs *cs = rctx->b.gfx.cs; in r600_emit_pfp_sync_me()
493 struct radeon_winsys_cs *cs = rctx->b.gfx.cs; in r600_cp_dma_copy_buffer()
575 struct radeon_winsys_cs *cs = rctx->b.dma.cs; in r600_dma_copy_buffer()
Dr600_streamout.c157 struct radeon_winsys_cs *cs = rctx->gfx.cs; in r600_flush_vgt_streamout()
183 struct radeon_winsys_cs *cs = rctx->gfx.cs; in r600_emit_streamout_begin()
256 struct radeon_winsys_cs *cs = rctx->gfx.cs; in r600_emit_streamout_end()
Dr600_pipe_common.h491 struct radeon_winsys_cs *cs;
710 void radeon_save_cs(struct radeon_winsys *ws, struct radeon_winsys_cs *cs,
801 void cayman_emit_msaa_sample_locs(struct radeon_winsys_cs *cs, int nr_samples);
802 void cayman_emit_msaa_config(struct radeon_winsys_cs *cs, int nr_samples,
/external/mesa3d/src/amd/vulkan/winsys/amdgpu/
Dradv_amdgpu_cs.c42 struct radeon_winsys_cs base;
71 struct radeon_winsys_cs *old_cs_buffers;
76 radv_amdgpu_cs(struct radeon_winsys_cs *base) in radv_amdgpu_cs()
161 static void radv_amdgpu_cs_destroy(struct radeon_winsys_cs *rcs) in radv_amdgpu_cs_destroy()
174 struct radeon_winsys_cs *rcs = &cs->old_cs_buffers[i]; in radv_amdgpu_cs_destroy()
197 static struct radeon_winsys_cs *
247 static void radv_amdgpu_cs_grow(struct radeon_winsys_cs *_cs, size_t min_size) in radv_amdgpu_cs_grow()
369 static bool radv_amdgpu_cs_finalize(struct radeon_winsys_cs *_cs) in radv_amdgpu_cs_finalize()
385 static void radv_amdgpu_cs_reset(struct radeon_winsys_cs *_cs) in radv_amdgpu_cs_reset()
417 struct radeon_winsys_cs *rcs = &cs->old_cs_buffers[i]; in radv_amdgpu_cs_reset()
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/external/mesa3d/src/gallium/winsys/radeon/drm/
Dradeon_drm_cs.c70 radeon_cs_create_fence(struct radeon_winsys_cs *rcs);
148 static struct radeon_winsys_cs *
332 static unsigned radeon_drm_cs_add_buffer(struct radeon_winsys_cs *rcs, in radeon_drm_cs_add_buffer()
379 static int radeon_drm_cs_lookup_buffer(struct radeon_winsys_cs *rcs, in radeon_drm_cs_lookup_buffer()
387 static bool radeon_drm_cs_validate(struct radeon_winsys_cs *rcs) in radeon_drm_cs_validate()
425 static bool radeon_drm_cs_check_space(struct radeon_winsys_cs *rcs, unsigned dw) in radeon_drm_cs_check_space()
431 static unsigned radeon_drm_cs_get_buffer_list(struct radeon_winsys_cs *rcs, in radeon_drm_cs_get_buffer_list()
482 void radeon_drm_cs_sync_flush(struct radeon_winsys_cs *rcs) in radeon_drm_cs_sync_flush()
543 static int radeon_drm_cs_flush(struct radeon_winsys_cs *rcs, in radeon_drm_cs_flush()
702 static void radeon_drm_cs_destroy(struct radeon_winsys_cs *rcs) in radeon_drm_cs_destroy()
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Dradeon_drm_cs.h68 struct radeon_winsys_cs base;
95 radeon_drm_cs(struct radeon_winsys_cs *base) in radeon_drm_cs()
134 void radeon_drm_cs_sync_flush(struct radeon_winsys_cs *rcs);
/external/mesa3d/src/gallium/winsys/amdgpu/drm/
Damdgpu_cs.h64 struct radeon_winsys_cs base;
192 amdgpu_ib(struct radeon_winsys_cs *base) in amdgpu_ib()
198 amdgpu_cs(struct radeon_winsys_cs *base) in amdgpu_cs()
260 void amdgpu_cs_sync_flush(struct radeon_winsys_cs *rcs);
Damdgpu_cs.c234 amdgpu_cs_get_next_fence(struct radeon_winsys_cs *rcs) in amdgpu_cs_get_next_fence()
581 static unsigned amdgpu_cs_add_buffer(struct radeon_winsys_cs *rcs, in amdgpu_cs_add_buffer()
865 static struct radeon_winsys_cs *
920 static bool amdgpu_cs_validate(struct radeon_winsys_cs *rcs) in amdgpu_cs_validate()
925 static bool amdgpu_cs_check_space(struct radeon_winsys_cs *rcs, unsigned dw) in amdgpu_cs_check_space()
1006 static unsigned amdgpu_cs_get_buffer_list(struct radeon_winsys_cs *rcs, in amdgpu_cs_get_buffer_list()
1055 static void amdgpu_cs_add_fence_dependency(struct radeon_winsys_cs *rws, in amdgpu_cs_add_fence_dependency()
1417 void amdgpu_cs_sync_flush(struct radeon_winsys_cs *rcs) in amdgpu_cs_sync_flush()
1425 static int amdgpu_cs_flush(struct radeon_winsys_cs *rcs, in amdgpu_cs_flush()
1539 static void amdgpu_cs_destroy(struct radeon_winsys_cs *rcs) in amdgpu_cs_destroy()
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/external/mesa3d/src/gallium/drivers/radeonsi/
Dsi_state_viewport.c114 struct radeon_winsys_cs *cs, in si_emit_one_scissor()
143 struct radeon_winsys_cs *cs = ctx->b.gfx.cs; in si_emit_guardband()
217 struct radeon_winsys_cs *cs = ctx->b.gfx.cs; in si_emit_scissors()
291 struct radeon_winsys_cs *cs = ctx->b.gfx.cs; in si_emit_one_viewport()
303 struct radeon_winsys_cs *cs = ctx->b.gfx.cs; in si_emit_viewports()
345 struct radeon_winsys_cs *cs = ctx->b.gfx.cs; in si_emit_depth_ranges()
Dsi_perfcounter.c458 struct radeon_winsys_cs *cs = ctx->gfx.cs; in si_pc_emit_instance()
479 struct radeon_winsys_cs *cs = ctx->gfx.cs; in si_pc_emit_shaders()
492 struct radeon_winsys_cs *cs = ctx->gfx.cs; in si_pc_emit_select()
585 struct radeon_winsys_cs *cs = ctx->gfx.cs; in si_pc_emit_start()
611 struct radeon_winsys_cs *cs = ctx->gfx.cs; in si_pc_emit_stop()
634 struct radeon_winsys_cs *cs = ctx->gfx.cs; in si_pc_emit_read()
Dsi_compute.c279 struct radeon_winsys_cs *cs = sctx->b.gfx.cs; in si_initialize_compute()
374 struct radeon_winsys_cs *cs = sctx->b.gfx.cs; in si_switch_compute_shader()
478 struct radeon_winsys_cs *cs = sctx->b.gfx.cs; in setup_scratch_rsrc_user_sgprs()
523 struct radeon_winsys_cs *cs = sctx->b.gfx.cs; in si_setup_user_sgprs_co_v2()
612 struct radeon_winsys_cs *cs = sctx->b.gfx.cs; in si_upload_compute_input()
676 struct radeon_winsys_cs *cs = sctx->b.gfx.cs; in si_setup_tgsi_grid()
723 struct radeon_winsys_cs *cs = sctx->b.gfx.cs; in si_emit_dispatch_packets()
Dcik_sdma.c35 struct radeon_winsys_cs *cs = ctx->b.dma.cs; in cik_sdma_copy_buffer()
76 struct radeon_winsys_cs *cs = sctx->b.dma.cs; in cik_sdma_clear_buffer()
233 struct radeon_winsys_cs *cs = sctx->b.dma.cs; in cik_sdma_copy_texture()
395 struct radeon_winsys_cs *cs = sctx->b.dma.cs; in cik_sdma_copy_texture()
490 struct radeon_winsys_cs *cs = sctx->b.dma.cs; in cik_sdma_copy_texture()
Dsi_state_binning.c329 struct radeon_winsys_cs *cs = sctx->b.gfx.cs; in si_emit_dpbb_disable()
434 struct radeon_winsys_cs *cs = sctx->b.gfx.cs; in si_emit_dpbb_state()

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