| /external/mesa3d/src/gallium/drivers/vc4/ |
| D | vc4_reorder_uniforms.c | 76 uint32_t *uniform_data = ralloc_array(c, uint32_t, next_uniform); in qir_reorder_uniforms()
78 ralloc_array(c, enum quniform_contents, next_uniform); in qir_reorder_uniforms()
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| D | vc4_opt_copy_propagation.c | 178 movs = ralloc_array(c, struct qinst *, c->num_temps); in qir_opt_copy_propagation()
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| /external/mesa3d/src/intel/compiler/ |
| D | brw_fs_live_variables.cpp | 272 start = ralloc_array(mem_ctx, int, num_vars); in fs_live_variables()
328 virtual_grf_start = ralloc_array(mem_ctx, int, num_vgrfs); in calculate_live_intervals()
329 virtual_grf_end = ralloc_array(mem_ctx, int, num_vgrfs); in calculate_live_intervals()
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| D | brw_vec4_live_variables.cpp | 239 int *start = ralloc_array(mem_ctx, int, this->alloc.total_size * 8); in calculate_live_intervals()
240 int *end = ralloc_array(mem_ctx, int, this->alloc.total_size * 8); in calculate_live_intervals()
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| D | brw_fs_reg_allocate.cpp | 143 uint8_t *ra_reg_to_grf = ralloc_array(compiler, uint8_t, ra_reg_count); in brw_alloc_reg_set()
147 int *classes = ralloc_array(compiler, int, class_count); in brw_alloc_reg_set()
152 unsigned int **q_values = ralloc_array(compiler, unsigned int *, in brw_alloc_reg_set()
155 q_values[i] = ralloc_array(q_values, unsigned int, class_count + 1); in brw_alloc_reg_set()
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| D | brw_vec4_reg_allocate.cpp | 114 compiler->vec4_reg_set.ra_reg_to_grf = ralloc_array(compiler, uint8_t, ra_reg_count); in brw_vec4_alloc_reg_set()
120 compiler->vec4_reg_set.classes = ralloc_array(compiler, int, class_count); in brw_vec4_alloc_reg_set()
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| D | brw_fs_combine_constants.cpp | 201 table.imm = ralloc_array(const_ctx, struct imm, table.size); in opt_combine_constants()
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| /external/mesa3d/src/compiler/nir/ |
| D | nir_phi_builder.c | 93 pb->blocks = ralloc_array(pb, nir_block *, pb->num_blocks); in nir_phi_builder_create()
102 pb->W = ralloc_array(pb, nir_block *, pb->num_blocks); in nir_phi_builder_create()
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| D | nir_repair_ssa.c | 45 state->def_set = ralloc_array(NULL, BITSET_WORD, num_words); in prep_build_phi()
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| D | nir_clone.c | 135 nc->elements = ralloc_array(nvar, nir_constant *, c->num_elements); in nir_constant_clone()
155 nvar->state_slots = ralloc_array(nvar, nir_state_slot, var->num_state_slots); in nir_variable_clone()
675 nfi->params = ralloc_array(state->ns, nir_variable *, fi->num_params); in clone_function_impl()
720 nfxn->params = ralloc_array(state->ns, nir_parameter, fxn->num_params); in clone_function()
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| D | nir_dominance.c | 139 block->dom_children = ralloc_array(mem_ctx, nir_block *, in calc_dom_children()
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| D | nir_lower_drawpixels.c | 77 var->state_slots = ralloc_array(var, nir_state_slot, 1); in create_uniform()
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| /external/mesa3d/src/gallium/drivers/freedreno/ir3/ |
| D | ir3_ra.c | 204 q_values = ralloc_array(set, unsigned *, total_class_count); in ir3_ra_alloc_reg_set()
212 set->ra_reg_to_gpr = ralloc_array(set, uint16_t, ra_reg_count); in ir3_ra_alloc_reg_set()
213 set->gpr_to_ra_reg = ralloc_array(set, uint16_t *, total_class_count); in ir3_ra_alloc_reg_set()
220 set->gpr_to_ra_reg[i] = ralloc_array(set, uint16_t, CLASS_REGS(i)); in ir3_ra_alloc_reg_set()
242 ralloc_array(set, uint16_t, HALF_CLASS_REGS(i)); in ir3_ra_alloc_reg_set()
264 ralloc_array(set, uint16_t, HIGH_CLASS_REGS(i)); in ir3_ra_alloc_reg_set()
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| /external/mesa3d/src/compiler/spirv/ |
| D | spirv_to_nir.c | 170 val->elems = ralloc_array(b, struct vtn_ssa_value *, elems); in vtn_undef_ssa_value()
230 val->elems = ralloc_array(b, struct vtn_ssa_value *, columns); in vtn_const_ssa_value()
251 val->elems = ralloc_array(b, struct vtn_ssa_value *, elems); in vtn_const_ssa_value()
261 val->elems = ralloc_array(b, struct vtn_ssa_value *, elems); in vtn_const_ssa_value()
614 dest->members = ralloc_array(b, struct vtn_type *, src->length); in vtn_type_copy()
618 dest->offsets = ralloc_array(b, unsigned, src->length); in vtn_type_copy()
624 dest->params = ralloc_array(b, struct vtn_type *, src->length); in vtn_type_copy()
1100 val->type->members = ralloc_array(b, struct vtn_type *, num_fields); in vtn_handle_type()
1101 val->type->offsets = ralloc_array(b, unsigned, num_fields); in vtn_handle_type()
1137 val->type->params = ralloc_array(b, struct vtn_type *, num_params); in vtn_handle_type()
[all …]
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| /external/mesa3d/src/util/ |
| D | register_allocate.c | 205 regs->regs[i].conflict_list = ralloc_array(regs->regs, in ra_alloc_reg_set()
351 regs->classes[b]->q = ralloc_array(regs, unsigned int, regs->class_count); in ra_set_finalize()
436 ralloc_array(g, unsigned int, g->nodes[i].adjacency_list_size); in ra_alloc_interference_graph()
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| D | string_buffer.c | 57 str->buf = ralloc_array(str, char, str->capacity); in _mesa_string_buffer_create()
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| D | ralloc.h | 140 #define ralloc_array(ctx, type, count) \ macro
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| D | ralloc.c | 353 ptr = ralloc_array(ctx, char, n + 1); in ralloc_strdup()
369 ptr = ralloc_array(ctx, char, n + 1); in ralloc_strndup()
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| /external/mesa3d/src/compiler/glsl/ |
| D | ir_clone.cpp | 275 …copy->subroutine_types = ralloc_array(mem_ctx, const struct glsl_type *, copy->num_subroutine_type… in clone()
356 c->const_elements = ralloc_array(c, ir_constant *, this->type->length); in clone()
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| D | link_uniform_blocks.cpp | 355 ralloc_array(blocks, gl_uniform_buffer_variable, num_variables); in create_buffer_blocks()
549 linked_block->Uniforms = ralloc_array(*linked_blocks, in link_cross_validate_uniform_block()
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| /external/mesa3d/src/broadcom/compiler/ |
| D | vir_opt_copy_propagate.c | 210 movs = ralloc_array(c, struct qinst *, c->num_temps); in vir_opt_copy_propagate()
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| D | vir.c | 597 ulist->data = ralloc_array(prog_data, uint32_t, count); in v3d_set_prog_data_uniforms()
600 ulist->contents = ralloc_array(prog_data, enum quniform_contents, count); in v3d_set_prog_data_uniforms()
619 prog_data->ubo_ranges = ralloc_array(prog_data, struct v3d_ubo_range, in v3d_set_prog_data_ubo()
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| /external/mesa3d/src/mesa/state_tracker/ |
| D | st_nir_lower_builtin.c | 143 var->state_slots = ralloc_array(var, nir_state_slot, 1); in get_variable()
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| D | st_glsl_to_tgsi_temprename.cpp | 178 storage = ralloc_array(mem_ctx, prog_scope, n); in prog_scope_storage()
849 access_record *reg_access = ralloc_array(mem_ctx, access_record, ntemps); in get_temp_registers_remapping()
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| /external/mesa3d/src/mesa/drivers/dri/i965/ |
| D | brw_nir_uniforms.cpp | 261 ralloc_array(var, nir_state_slot, var->num_state_slots); in brw_nir_lower_patch_vertices_in_to_uniform()
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