Searched refs:rbit (Results 1 – 25 of 122) sorted by relevance
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3 ; The llvm.aarch64.rbit intrinsic should be auto-upgraded to the7 ; CHECK: rbit w0, w010 %rbit.i = call i32 @llvm.aarch64.rbit.i32(i32 %t)11 ret i32 %rbit.i15 ; CHECK: rbit x0, x018 %rbit.i = call i64 @llvm.aarch64.rbit.i64(i64 %t)19 ret i64 %rbit.i22 declare i64 @llvm.aarch64.rbit.i64(i64)23 declare i32 @llvm.aarch64.rbit.i32(i32)26 ; CHECK: rbit w0, w0[all …]
5 ;CHECK: rbit.8b7 %tmp3 = call <8 x i8> @llvm.aarch64.neon.rbit.v8i8(<8 x i8> %tmp1)13 ;CHECK: rbit.16b15 %tmp3 = call <16 x i8> @llvm.aarch64.neon.rbit.v16i8(<16 x i8> %tmp1)19 declare <8 x i8> @llvm.aarch64.neon.rbit.v8i8(<8 x i8>) nounwind readnone20 declare <16 x i8> @llvm.aarch64.neon.rbit.v16i8(<16 x i8>) nounwind readnone
10 ; CHECK-DAG: rbit [[REG2:w[0-9]+]], [[REG1]]13 ; CHECK-DAG: rbit [[REG4:w[0-9]+]], [[REG3]]24 ; CHECK: rbit [[REG:w[0-9]+]], w0
89 ; CHECK: rbit [[REVERSED:w[0-9]+]], {{w[0-9]+}}99 ; CHECK: rbit [[REVERSED:x[0-9]+]], {{x[0-9]+}}109 ; CHECK: rbit [[REVERSED:w[0-9]+]], {{w[0-9]+}}119 ; CHECK: rbit [[REVERSED:x[0-9]+]], {{x[0-9]+}}
3 ; CHECK-LABEL: rbit4 ; CHECK: rbit r0, r05 define i32 @rbit(i32 %t) {7 %rbit = call i32 @llvm.arm.rbit(i32 %t)8 ret i32 %rbit13 ; CHECK: rbit r0, r016 %rbit.i = call i32 @llvm.arm.rbit(i32 0)17 ret i32 %rbit.i20 declare i32 @llvm.arm.rbit(i32)25 ; CHECK: rbit r0, r0[all …]
16 ; CHECK: rbit25 ; CHECK: rbit33 ; CHECK: rbit41 ; CHECK: rbit42 ; CHECK: rbit56 ; CHECK: rbit65 ; CHECK: rbit74 ; CHECK: rbit82 ; CHECK: rbit83 ; CHECK: rbit
8 ;CHECK-NOT: rbit9 ;RBIT: rbit
3 ; CHECK-LABEL: rbit4 ; CHECK: rbit r0, r05 define i32 @rbit(i32 %t) {7 %rbit = call i32 @llvm.arm.rbit(i32 %t)8 ret i32 %rbit13 ; CHECK-NOT: rbit17 %rbit.i = call i32 @llvm.arm.rbit(i32 0)18 ret i32 %rbit.i21 declare i32 @llvm.arm.rbit(i32)26 ; CHECK: rbit r0, r0[all …]
4 ; CHECK: rbit w0, w07 %rbit.i = call i32 @llvm.aarch64.rbit.i32(i32 %t)8 ret i32 %rbit.i12 ; CHECK: rbit x0, x015 %rbit.i = call i64 @llvm.aarch64.rbit.i64(i64 %t)16 ret i64 %rbit.i19 declare i64 @llvm.aarch64.rbit.i64(i64)20 declare i32 @llvm.aarch64.rbit.i32(i32)
10 rbit z0.b, p7/m, z31.b label16 rbit z0.h, p7/m, z31.h label22 rbit z0.s, p7/m, z31.s label28 rbit z0.d, p7/m, z31.d label44 rbit z0.d, p7/m, z31.d label56 rbit z0.d, p7/m, z31.d label
7 rbit z0.d, p8/m, z0.d label
135 double r, rbit; in htb_class_dump_line() local139 rbit = nl_cancel_down_bits(htb->ch_rate.rs_rate*8, &rubit); in htb_class_dump_line()142 r, ru, rbit, rubit, 1<<htb->ch_rate.rs_cell_log); in htb_class_dump_line()156 double r, rbit; in htb_class_dump_details() local160 rbit = nl_cancel_down_bits(htb->ch_ceil.rs_rate*8, &rubit); in htb_class_dump_details()163 r, ru, rbit, rubit, 1<<htb->ch_ceil.rs_cell_log); in htb_class_dump_details()
101 double r, rbit; in cbq_dump_line() local108 rbit = nl_cancel_down_bits(cbq->cbq_rate.rate * 8, &rubit); in cbq_dump_line()111 r, ru, rbit, rubit, cbq->cbq_wrr.priority); in cbq_dump_line()
79 double r, rbit, lim; in tbf_dump_line() local87 rbit = nl_cancel_down_bits(tbf->qt_rate.rs_rate*8, &rubit); in tbf_dump_line()91 r, ru, rbit, rubit, lim, limu); in tbf_dump_line()
1 ; Show that we know how to translate rbit.36 ; ASM-NEXT: rbit r0, r0
7 ; CHECK: rbit
8 rbit r4,r9 label
14 unsigned rbit(unsigned a) { in rbit() function
73 unsigned rbit(unsigned a) { in rbit() function
96 0xe0,0x5b,0x60,0x6e = rbit v0.16b, v31.16b97 0x21,0x59,0x60,0x2e = rbit v1.8b, v9.8b