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Searched refs:reg20 (Results 1 – 6 of 6) sorted by relevance

/external/u-boot/board/gdsys/common/
Dosd.c203 u8 reg0, reg4, reg8, reg12, reg18, reg20; in ics8n3qv01_set() local
232 reg20 = i2c_reg_read(ICS8N3QV01_I2C_ADDR, 20) & 0x1f; in ics8n3qv01_set()
233 reg20 |= mint & (1 << 5); in ics8n3qv01_set()
234 i2c_reg_write(ICS8N3QV01_I2C_ADDR, 20, reg20); in ics8n3qv01_set()
/external/u-boot/arch/mips/include/asm/
Dprocessor.h69 unsigned long reg17, reg18, reg19, reg20, reg21, reg22, reg23; member
/external/llvm/include/llvm/Support/
DDwarf.def221 HANDLE_DW_OP(0x64, reg20)
/external/elfutils/tests/
Drun-addrcfi.sh152 SSE reg20 (%xmm3): undefined
218 SSE reg20 (%xmm3): undefined
322 integer reg20 (r20): same_value
1344 integer reg20 (r20): same_value
2372 integer reg20 (r20): same_value
3398 FPU reg20 (%f1): undefined
3475 FPU reg20 (%f1): undefined
3553 FPA reg20 (f4): undefined
3629 integer reg20 (x20): same_value
3705 SSE reg20 (%xmm3): undefined
/external/elfutils/libdw/
Dknown-dwarf.h511 DWARF_ONE_KNOWN_DW_OP (reg20, DW_OP_reg20) \
/external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/BinaryFormat/
DDwarf.def544 HANDLE_DW_OP(0x64, reg20, 2, DWARF)