Searched refs:reg_b (Results 1 – 6 of 6) sorted by relevance
| /external/u-boot/drivers/rtc/ |
| D | ds164x.c | 135 uchar reg_a, reg_b; in rtc_reset() local
138 reg_b = rtc_read( RTC_CONTROLB ); in rtc_reset()
140 if ( reg_b & RTC_CB_OSC_DISABLE ) in rtc_reset()
144 reg_b &= ~RTC_CB_OSC_DISABLE; in rtc_reset()
147 rtc_write( RTC_CONTROLB, reg_b ); in rtc_reset()
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| D | ds1556.c | 136 uchar reg_a, reg_b, reg_c; in rtc_reset() local
139 reg_b = rtc_read( RTC_CONTROLB ); in rtc_reset()
141 if ( reg_b & RTC_CB_OSC_DISABLE ) in rtc_reset()
145 reg_b &= ~RTC_CB_OSC_DISABLE; in rtc_reset()
148 rtc_write( RTC_CONTROLB, reg_b ); in rtc_reset()
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| D | ds174x.c | 133 uchar reg_a, reg_b, reg_c; in rtc_reset() local
136 reg_b = rtc_read( RTC_CONTROLB ); in rtc_reset()
138 if ( reg_b & RTC_CB_OSC_DISABLE ) in rtc_reset()
142 reg_b &= ~RTC_CB_OSC_DISABLE; in rtc_reset()
145 rtc_write( RTC_CONTROLB, reg_b ); in rtc_reset()
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| /external/u-boot/drivers/clk/ |
| D | ics8n3qv01.c | 34 u8 reg_a, reg_b, reg_c, reg_d, reg_f; in ics8n3qv01_get_fout_calc() local
54 reg_b = val[1]; /* Register 4 + index */ in ics8n3qv01_get_fout_calc()
62 (reg_b << 9) | /* MFRACi[16-9] */ in ics8n3qv01_get_fout_calc()
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| /external/u-boot/board/gdsys/common/ |
| D | osd.c | 137 u8 reg_a, reg_b, reg_c, reg_d, reg_f; in ics8n3qv01_get_fout_calc() local
144 reg_b = i2c_reg_read(ICS8N3QV01_I2C_ADDR, 4 + index); in ics8n3qv01_get_fout_calc()
150 mfrac = ((reg_a & 0x01) << 17) | (reg_b << 9) | (reg_c << 1) in ics8n3qv01_get_fout_calc()
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| /external/swiftshader/third_party/LLVM/lib/Target/CellSPU/ |
| D | SPUOperands.td | 646 let MIOperandInfo = (ops ptr_rc:$reg_a, ptr_rc:$reg_b);
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