Searched refs:reg_bit_set (Results 1 – 13 of 13) sorted by relevance
| /external/u-boot/drivers/ddr/marvell/axp/ |
| D | xor.c | 202 reg_bit_set(XOR_ACTIVATION_REG(XOR_UNIT(chan), XOR_CHAN(chan)), in mv_xor_mem_init()
313 reg_bit_set(XOR_ACTIVATION_REG(XOR_UNIT(chan), XOR_CHAN(chan)), in mv_xor_transfer()
404 reg_bit_set(XOR_ACTIVATION_REG(XOR_UNIT(chan), XOR_CHAN(chan)), in mv_xor_cmd_set()
410 reg_bit_set(XOR_ACTIVATION_REG(XOR_UNIT(chan), XOR_CHAN(chan)), in mv_xor_cmd_set()
416 reg_bit_set(XOR_ACTIVATION_REG(XOR_UNIT(chan), XOR_CHAN(chan)), in mv_xor_cmd_set()
422 reg_bit_set(XOR_ACTIVATION_REG(XOR_UNIT(chan), XOR_CHAN(chan)), in mv_xor_cmd_set()
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| D | ddr3_init.c | 381 reg_bit_set(CPU_CONFIGURATION_REG(3), CPU_MRVL_ID_OFFSET); in ddr3_init_main()
382 reg_bit_set(CPU_CONFIGURATION_REG(2), CPU_MRVL_ID_OFFSET); in ddr3_init_main()
384 reg_bit_set(CPU_CONFIGURATION_REG(1), CPU_MRVL_ID_OFFSET); in ddr3_init_main()
386 reg_bit_set(CPU_CONFIGURATION_REG(0), CPU_MRVL_ID_OFFSET); in ddr3_init_main()
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| D | ddr3_init.h | 132 static inline void reg_bit_set(u32 addr, u32 mask) in reg_bit_set() function
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| /external/u-boot/drivers/ddr/marvell/a38x/ |
| D | xor.c | 215 reg_bit_set(XOR_ACTIVATION_REG(XOR_UNIT(chan), XOR_CHAN(chan)), in mv_xor_mem_init()
304 reg_bit_set(XOR_ACTIVATION_REG in mv_xor_command_set()
310 reg_bit_set(XOR_ACTIVATION_REG in mv_xor_command_set()
317 reg_bit_set(XOR_ACTIVATION_REG in mv_xor_command_set()
323 reg_bit_set(XOR_ACTIVATION_REG in mv_xor_command_set()
460 reg_bit_set(XOR_ACTIVATION_REG(XOR_UNIT(chan), XOR_CHAN(chan)), in mv_xor_transfer()
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| D | mv_ddr_plat.c | 194 reg_bit_set(TSEN_CONTROL_MSB_REG, TSEN_CONTROL_MSB_RST_MASK); in ddr3_ctrl_get_junc_temp()
1223 reg_bit_set(CPU_CONFIGURATION_REG(3), CPU_MRVL_ID_OFFSET); in mv_ddr_pre_training_soc_config()
1224 reg_bit_set(CPU_CONFIGURATION_REG(2), CPU_MRVL_ID_OFFSET); in mv_ddr_pre_training_soc_config()
1227 reg_bit_set(CPU_CONFIGURATION_REG(1), CPU_MRVL_ID_OFFSET); in mv_ddr_pre_training_soc_config()
1230 reg_bit_set(CPU_CONFIGURATION_REG(0), CPU_MRVL_ID_OFFSET); in mv_ddr_pre_training_soc_config()
1243 reg_bit_set(SDRAM_INIT_CTRL_REG, in mv_ddr_pre_training_soc_config()
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| D | ddr_ml_wrapper.h | 138 static inline void reg_bit_set(u32 addr, u32 mask) in reg_bit_set() function
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| /external/u-boot/arch/arm/mach-mvebu/serdes/a38x/ |
| D | ctrl_pex.c | 345 reg_bit_set(PEX_CFG_DIRECT_ACCESS(pex_if, PEX_STATUS_AND_COMMAND), in pex_config_read()
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| /external/u-boot/arch/arm/mach-mvebu/serdes/axp/ |
| D | high_speed_env_lib.c | 1529 reg_bit_set(PEX_CFG_DIRECT_ACCESS(pex_if, PEX_STATUS_AND_COMMAND), in pex_cfg_read()
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| /external/v8/src/arm64/ |
| D | macro-assembler-arm64.h | 139 reg_bit_clear, reg_bit_set, enumerator
1296 (reg_bit_clear == (reg_bit_set ^ 1)) &&
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| D | macro-assembler-arm64.cc | 934 case reg_bit_set: Tbnz(reg, bit, label); break; in B()
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| /external/vixl/src/aarch64/ |
| D | macro-assembler-aarch64.h | 563 reg_bit_set, enumerator
1001 (reg_bit_clear == (reg_bit_set ^ 1)) &&
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| D | macro-assembler-aarch64.cc | 566 case reg_bit_set: in B()
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| /external/vixl/test/aarch64/ |
| D | test-assembler-aarch64.cc | 3061 __ B(&fail, reg_bit_set, x10, 3); in TEST()
3078 __ B(&l5, reg_bit_set, x10, 1); in TEST()
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