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Searched refs:regs (Results 1 – 25 of 930) sorted by relevance

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/external/u-boot/board/cavium/thunderx/
Datf.c20 struct pt_regs regs; in atf_read_mmc() local
21 regs.regs[0] = THUNDERX_MMC_READ; in atf_read_mmc()
22 regs.regs[1] = offset; in atf_read_mmc()
23 regs.regs[2] = size; in atf_read_mmc()
24 regs.regs[3] = (uintptr_t)buffer; in atf_read_mmc()
26 smc_call(&regs); in atf_read_mmc()
28 return regs.regs[0]; in atf_read_mmc()
33 struct pt_regs regs; in atf_read_nor() local
34 regs.regs[0] = THUNDERX_NOR_READ; in atf_read_nor()
35 regs.regs[1] = offset; in atf_read_nor()
[all …]
/external/libunwind/src/aarch64/
DGresume.c43 unsigned long regs[11]; in aarch64_local_resume() local
44 regs[0] = uc->uc_mcontext.regs[19]; in aarch64_local_resume()
45 regs[1] = uc->uc_mcontext.regs[20]; in aarch64_local_resume()
46 regs[2] = uc->uc_mcontext.regs[21]; in aarch64_local_resume()
47 regs[3] = uc->uc_mcontext.regs[22]; in aarch64_local_resume()
48 regs[4] = uc->uc_mcontext.regs[23]; in aarch64_local_resume()
49 regs[5] = uc->uc_mcontext.regs[24]; in aarch64_local_resume()
50 regs[6] = uc->uc_mcontext.regs[25]; in aarch64_local_resume()
51 regs[7] = uc->uc_mcontext.regs[26]; in aarch64_local_resume()
52 regs[8] = uc->uc_mcontext.regs[27]; in aarch64_local_resume()
[all …]
Dgen-offsets.c30 SC ("R0", regs[0]); in main()
31 SC ("R1", regs[1]); in main()
32 SC ("R2", regs[2]); in main()
33 SC ("R3", regs[3]); in main()
34 SC ("R4", regs[4]); in main()
35 SC ("R5", regs[5]); in main()
36 SC ("R6", regs[6]); in main()
37 SC ("R7", regs[7]); in main()
38 SC ("R8", regs[8]); in main()
39 SC ("R9", regs[9]); in main()
[all …]
/external/linux-kselftest/tools/testing/selftests/x86/
Dptrace_syscall.c201 struct user_regs_struct regs; in test_ptrace_syscall_restart() local
208 if (ptrace(PTRACE_GETREGS, chld, 0, &regs) != 0) in test_ptrace_syscall_restart()
211 if (regs.user_syscall_nr != SYS_gettid || in test_ptrace_syscall_restart()
212 regs.user_arg0 != 10 || regs.user_arg1 != 11 || in test_ptrace_syscall_restart()
213 regs.user_arg2 != 12 || regs.user_arg3 != 13 || in test_ptrace_syscall_restart()
214 regs.user_arg4 != 14 || regs.user_arg5 != 15) { in test_ptrace_syscall_restart()
215 …regs.user_syscall_nr, (unsigned long)regs.user_arg0, (unsigned long)regs.user_arg1, (unsigned long… in test_ptrace_syscall_restart()
222 (unsigned long)regs.user_ip); in test_ptrace_syscall_restart()
230 regs.user_ax = regs.user_syscall_nr; in test_ptrace_syscall_restart()
231 regs.user_ip -= 2; in test_ptrace_syscall_restart()
[all …]
/external/linux-kselftest/tools/testing/selftests/powerpc/ptrace/
Dptrace-syscall.c56 struct pt_regs regs; in test_ptrace_syscall_restart() local
96 if (ptrace(PTRACE_GETREGS, chld, 0, &regs) != 0) in test_ptrace_syscall_restart()
103 if (regs.user_syscall_nr != SYS_gettid || in test_ptrace_syscall_restart()
104 regs.user_arg0 != 10 || regs.user_arg1 != 11 || in test_ptrace_syscall_restart()
105 regs.user_arg2 != 12 || regs.user_arg3 != 13 || in test_ptrace_syscall_restart()
106 regs.user_arg4 != 14 || regs.user_arg5 != 15) { in test_ptrace_syscall_restart()
108 (unsigned long)regs.user_syscall_nr, in test_ptrace_syscall_restart()
109 (unsigned long)regs.user_arg0, in test_ptrace_syscall_restart()
110 (unsigned long)regs.user_arg1, in test_ptrace_syscall_restart()
111 (unsigned long)regs.user_arg2, in test_ptrace_syscall_restart()
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/external/u-boot/arch/powerpc/cpu/mpc83xx/
Dtraps.c51 void show_regs(struct pt_regs *regs) in show_regs() argument
56 regs->nip, regs->xer, regs->link, regs, regs->trap, regs->dar); in show_regs()
58 regs->msr, regs->msr&MSR_EE ? 1 : 0, regs->msr&MSR_PR ? 1 : 0, in show_regs()
59 regs->msr & MSR_FP ? 1 : 0,regs->msr&MSR_ME ? 1 : 0, in show_regs()
60 regs->msr&MSR_IR ? 1 : 0, in show_regs()
61 regs->msr&MSR_DR ? 1 : 0); in show_regs()
69 printf("%08lX ", regs->gpr[i]); in show_regs()
77 static void _exception(int signr, struct pt_regs *regs) in _exception() argument
79 show_regs(regs); in _exception()
80 print_backtrace((unsigned long *)regs->gpr[1]); in _exception()
[all …]
/external/u-boot/arch/powerpc/cpu/mpc86xx/
Dtraps.c58 void show_regs(struct pt_regs *regs) in show_regs() argument
64 regs->nip, regs->xer, regs->link, regs, regs->trap, regs->dar); in show_regs()
67 regs->msr, regs->msr & MSR_EE ? 1 : 0, in show_regs()
68 regs->msr & MSR_PR ? 1 : 0, regs->msr & MSR_FP ? 1 : 0, in show_regs()
69 regs->msr & MSR_ME ? 1 : 0, regs->msr & MSR_IR ? 1 : 0, in show_regs()
70 regs->msr & MSR_DR ? 1 : 0); in show_regs()
78 printf("%08lX ", regs->gpr[i]); in show_regs()
86 static void _exception(int signr, struct pt_regs *regs) in _exception() argument
88 show_regs(regs); in _exception()
89 print_backtrace((unsigned long *)regs->gpr[1]); in _exception()
[all …]
/external/u-boot/arch/powerpc/cpu/mpc8xx/
Dtraps.c54 static void show_regs(struct pt_regs *regs) in show_regs() argument
59 regs->nip, regs->xer, regs->link, regs, regs->trap, regs->dar); in show_regs()
61 regs->msr, regs->msr & MSR_EE ? 1 : 0, in show_regs()
62 regs->msr & MSR_PR ? 1 : 0, regs->msr & MSR_FP ? 1 : 0, in show_regs()
63 regs->msr & MSR_ME ? 1 : 0, regs->msr & MSR_IR ? 1 : 0, in show_regs()
64 regs->msr & MSR_DR ? 1 : 0); in show_regs()
71 printf("%08lX ", regs->gpr[i]); in show_regs()
78 static void _exception(int signr, struct pt_regs *regs) in _exception() argument
80 show_regs(regs); in _exception()
81 print_backtrace((unsigned long *)regs->gpr[1]); in _exception()
[all …]
/external/u-boot/arch/powerpc/cpu/mpc85xx/
Dtraps.c87 void show_regs(struct pt_regs *regs) in show_regs() argument
92 regs->nip, regs->xer, regs->link, regs, regs->trap, regs->dar); in show_regs()
94 regs->msr, regs->msr&MSR_EE ? 1 : 0, regs->msr&MSR_PR ? 1 : 0, in show_regs()
95 regs->msr & MSR_FP ? 1 : 0,regs->msr&MSR_ME ? 1 : 0, in show_regs()
96 regs->msr&MSR_IR ? 1 : 0, in show_regs()
97 regs->msr&MSR_DR ? 1 : 0); in show_regs()
106 printf("%08lX ", regs->gpr[i]); in show_regs()
115 static void _exception(int signr, struct pt_regs *regs) in _exception() argument
117 show_regs(regs); in _exception()
118 print_backtrace((unsigned long *)regs->gpr[1]); in _exception()
[all …]
/external/u-boot/arch/nds32/lib/
Dinterrupts.c70 void show_regs(struct pt_regs *regs) in show_regs() argument
77 regs->ipc, regs->sp, regs->lp, regs->gp, regs->fp); in show_regs()
79 regs->d1hi, regs->d1lo, regs->d0hi, regs->d0lo); in show_regs()
81 regs->p1, regs->p0, regs->r[25], regs->r[24]); in show_regs()
83 regs->r[23], regs->r[22], regs->r[21], regs->r[20]); in show_regs()
85 regs->r[19], regs->r[18], regs->r[17], regs->r[16]); in show_regs()
87 regs->r[15], regs->r[14], regs->r[13], regs->r[12]); in show_regs()
89 regs->r[11], regs->r[10], regs->r[9], regs->r[8]); in show_regs()
91 regs->r[7], regs->r[6], regs->r[5], regs->r[4]); in show_regs()
93 regs->r[3], regs->r[2], regs->r[1], regs->r[0]); in show_regs()
[all …]
/external/u-boot/arch/arc/lib/
Dinterrupts.c61 void show_regs(struct pt_regs *regs) in show_regs() argument
63 printf("ECR:\t0x%08lx\n", regs->ecr); in show_regs()
65 regs->ret, regs->blink, regs->status32); in show_regs()
66 printf("GP: 0x%08lx\t r25: 0x%08lx\t\n", regs->r26, regs->r25); in show_regs()
67 printf("BTA: 0x%08lx\t SP: 0x%08lx\t FP: 0x%08lx\n", regs->bta, in show_regs()
68 regs->sp, regs->fp); in show_regs()
69 printf("LPS: 0x%08lx\tLPE: 0x%08lx\tLPC: 0x%08lx\n", regs->lp_start, in show_regs()
70 regs->lp_end, regs->lp_count); in show_regs()
72 print_reg_file(&(regs->r0), 0); in show_regs()
75 void bad_mode(struct pt_regs *regs) in bad_mode() argument
[all …]
/external/mesa3d/src/util/
Dregister_allocate.c92 struct ra_reg *regs; member
107 BITSET_WORD *regs; member
162 struct ra_regs *regs; member
178 unsigned int (*select_reg_callback)(struct ra_graph *g, BITSET_WORD *regs,
193 struct ra_regs *regs; in ra_alloc_reg_set() local
195 regs = rzalloc(mem_ctx, struct ra_regs); in ra_alloc_reg_set()
196 regs->count = count; in ra_alloc_reg_set()
197 regs->regs = rzalloc_array(regs, struct ra_reg, count); in ra_alloc_reg_set()
200 regs->regs[i].conflicts = rzalloc_array(regs->regs, BITSET_WORD, in ra_alloc_reg_set()
202 BITSET_SET(regs->regs[i].conflicts, i); in ra_alloc_reg_set()
[all …]
/external/u-boot/drivers/video/rockchip/
Drk_mipi.c52 static void rk_mipi_dsi_write(uintptr_t regs, u32 reg, u32 val) in rk_mipi_dsi_write() argument
58 uintptr_t addr = (reg >> ADDR_SHIFT) + regs; in rk_mipi_dsi_write()
84 uintptr_t regs = priv->regs; in rk_mipi_dsi_enable() local
91 rk_mipi_dsi_write(regs, VID_HSA_TIME, timing->hsync_len.typ); in rk_mipi_dsi_enable()
92 rk_mipi_dsi_write(regs, VID_HBP_TIME, timing->hback_porch.typ); in rk_mipi_dsi_enable()
93 rk_mipi_dsi_write(regs, VID_HLINE_TIME, (timing->hsync_len.typ in rk_mipi_dsi_enable()
96 rk_mipi_dsi_write(regs, VID_VSA_LINES, timing->vsync_len.typ); in rk_mipi_dsi_enable()
97 rk_mipi_dsi_write(regs, VID_VBP_LINES, timing->vback_porch.typ); in rk_mipi_dsi_enable()
98 rk_mipi_dsi_write(regs, VID_VFP_LINES, timing->vfront_porch.typ); in rk_mipi_dsi_enable()
99 rk_mipi_dsi_write(regs, VID_ACTIVE_LINES, timing->vactive.typ); in rk_mipi_dsi_enable()
[all …]
Drk_edp.c37 struct rk3288_edp *regs; member
44 static void rk_edp_init_refclk(struct rk3288_edp *regs) in rk_edp_init_refclk() argument
46 writel(SEL_24M, &regs->analog_ctl_2); in rk_edp_init_refclk()
47 writel(REF_CLK_24M, &regs->pll_reg_1); in rk_edp_init_refclk()
50 V2L_CUR_SEL_1MA, &regs->pll_reg_2); in rk_edp_init_refclk()
54 &regs->pll_reg_3); in rk_edp_init_refclk()
58 &regs->pll_reg_5); in rk_edp_init_refclk()
60 writel(SSC_OFFSET | SSC_MODE | SSC_DEPTH, &regs->ssc_reg); in rk_edp_init_refclk()
64 &regs->tx_common); in rk_edp_init_refclk()
67 &regs->dp_aux); in rk_edp_init_refclk()
[all …]
/external/u-boot/drivers/video/
Dbroadwell_igd.c23 u8 *regs; member
71 u8 *regs = priv->regs; in haswell_early_init() local
75 writel(0x00000020, regs + 0xa180); in haswell_early_init()
76 writel(0x00010001, regs + 0xa188); in haswell_early_init()
77 ret = poll32(regs + 0x130044, 1, 1); in haswell_early_init()
82 setbits_le32(regs + 0xa248, 0x00000016); in haswell_early_init()
85 writel(0x00070020, regs + 0xa000); in haswell_early_init()
88 clrsetbits_le32(regs + 0xa180, ~0xff3fffff, 0x15000000); in haswell_early_init()
91 writel(0x000003fd, regs + 0x9424); in haswell_early_init()
94 writel(0x00000080, regs + 0x9400); in haswell_early_init()
[all …]
Datmel_hlcdfb.c62 struct atmel_hlcd_regs *regs; in lcd_ctrl_init() local
68 regs = (struct atmel_hlcd_regs *)panel_info.mmio; in lcd_ctrl_init()
71 writel(LCDC_LCDDIS_DISPDIS, &regs->lcdc_lcddis); in lcd_ctrl_init()
72 ret = wait_for_bit_le32(&regs->lcdc_lcdsr, LCDC_LCDSR_DISPSTS, in lcd_ctrl_init()
77 writel(LCDC_LCDDIS_SYNCDIS, &regs->lcdc_lcddis); in lcd_ctrl_init()
78 ret = wait_for_bit_le32(&regs->lcdc_lcdsr, LCDC_LCDSR_LCDSTS, in lcd_ctrl_init()
83 writel(LCDC_LCDDIS_CLKDIS, &regs->lcdc_lcddis); in lcd_ctrl_init()
84 ret = wait_for_bit_le32(&regs->lcdc_lcdsr, LCDC_LCDSR_CLKSTS, in lcd_ctrl_init()
89 writel(LCDC_LCDDIS_PWMDIS, &regs->lcdc_lcddis); in lcd_ctrl_init()
90 ret = wait_for_bit_le32(&regs->lcdc_lcdsr, LCDC_LCDSR_PWMSTS, in lcd_ctrl_init()
[all …]
/external/u-boot/drivers/ddr/fsl/
Darm_ddr_gen3.c30 void fsl_ddr_set_memctl_regs(const fsl_ddr_cfg_regs_t *regs, in fsl_ddr_set_memctl_regs() argument
66 if (regs->ddr_eor) in fsl_ddr_set_memctl_regs()
67 ddr_out32(&ddr->eor, regs->ddr_eor); in fsl_ddr_set_memctl_regs()
70 ddr_out32(&ddr->cs0_bnds, regs->cs[i].bnds); in fsl_ddr_set_memctl_regs()
71 ddr_out32(&ddr->cs0_config, regs->cs[i].config); in fsl_ddr_set_memctl_regs()
72 ddr_out32(&ddr->cs0_config_2, regs->cs[i].config_2); in fsl_ddr_set_memctl_regs()
75 ddr_out32(&ddr->cs1_bnds, regs->cs[i].bnds); in fsl_ddr_set_memctl_regs()
76 ddr_out32(&ddr->cs1_config, regs->cs[i].config); in fsl_ddr_set_memctl_regs()
77 ddr_out32(&ddr->cs1_config_2, regs->cs[i].config_2); in fsl_ddr_set_memctl_regs()
80 ddr_out32(&ddr->cs2_bnds, regs->cs[i].bnds); in fsl_ddr_set_memctl_regs()
[all …]
Dfsl_ddr_gen4.c50 void fsl_ddr_set_memctl_regs(const fsl_ddr_cfg_regs_t *regs, in fsl_ddr_set_memctl_regs() argument
96 mod_bnds = regs->cs[0].config & CTLR_INTLV_MASK; in fsl_ddr_set_memctl_regs()
102 ddr_out32(&ddr->ddr_cdr1, regs->ddr_cdr1); in fsl_ddr_set_memctl_regs()
104 if (regs->ddr_eor) in fsl_ddr_set_memctl_regs()
105 ddr_out32(&ddr->eor, regs->ddr_eor); in fsl_ddr_set_memctl_regs()
107 ddr_out32(&ddr->sdram_clk_cntl, regs->ddr_sdram_clk_cntl); in fsl_ddr_set_memctl_regs()
113 (regs->cs[i].bnds & 0xfffefffe) >> 1); in fsl_ddr_set_memctl_regs()
115 (regs->cs[i].config & in fsl_ddr_set_memctl_regs()
118 ddr_out32(&ddr->cs0_bnds, regs->cs[i].bnds); in fsl_ddr_set_memctl_regs()
119 ddr_out32(&ddr->cs0_config, regs->cs[i].config); in fsl_ddr_set_memctl_regs()
[all …]
Dmpc85xx_ddr_gen3.c24 void fsl_ddr_set_memctl_regs(const fsl_ddr_cfg_regs_t *regs, in fsl_ddr_set_memctl_regs() argument
69 if (regs->ddr_eor) in fsl_ddr_set_memctl_regs()
70 out_be32(&ddr->eor, regs->ddr_eor); in fsl_ddr_set_memctl_regs()
74 cs_sa = (regs->cs[i].bnds >> 16) & 0xfff; in fsl_ddr_set_memctl_regs()
75 cs_ea = regs->cs[i].bnds & 0xfff; in fsl_ddr_set_memctl_regs()
78 csn_bnds_backup = regs->cs[i].bnds; in fsl_ddr_set_memctl_regs()
79 csn_bnds_t = (unsigned int *) &regs->cs[i].bnds; in fsl_ddr_set_memctl_regs()
81 *csn_bnds_t = regs->cs[i].bnds + 0x01000000; in fsl_ddr_set_memctl_regs()
83 *csn_bnds_t = regs->cs[i].bnds + 0x01000100; in fsl_ddr_set_memctl_regs()
86 csn, csn_bnds_backup, regs->cs[i].bnds); in fsl_ddr_set_memctl_regs()
[all …]
/external/u-boot/drivers/misc/
Dmxc_ocotp.c157 static void wait_busy(struct ocotp_regs *regs, unsigned int delay_us) in wait_busy() argument
159 while (readl(&regs->ctrl) & BM_CTRL_BUSY) in wait_busy()
163 static void clear_error(struct ocotp_regs *regs) in clear_error() argument
165 writel(BM_CTRL_ERROR, &regs->ctrl_clr); in clear_error()
168 static int prepare_access(struct ocotp_regs **regs, u32 bank, u32 word, in prepare_access() argument
171 *regs = (struct ocotp_regs *)OCOTP_BASE_ADDR; in prepare_access()
174 word >= ARRAY_SIZE((*regs)->bank[0].fuse_regs) >> 2 || in prepare_access()
182 word >= ARRAY_SIZE((*regs)->bank[0].fuse_regs) >> 3) { in prepare_access()
190 wait_busy(*regs, 1); in prepare_access()
191 clear_error(*regs); in prepare_access()
[all …]
/external/libunwind/src/arm/
DGresume.c47 unsigned long regs[10]; in arm_local_resume() local
48 regs[0] = uc->regs[4]; in arm_local_resume()
49 regs[1] = uc->regs[5]; in arm_local_resume()
50 regs[2] = uc->regs[6]; in arm_local_resume()
51 regs[3] = uc->regs[7]; in arm_local_resume()
52 regs[4] = uc->regs[8]; in arm_local_resume()
53 regs[5] = uc->regs[9]; in arm_local_resume()
54 regs[6] = uc->regs[10]; in arm_local_resume()
55 regs[7] = uc->regs[11]; /* FP */ in arm_local_resume()
56 regs[8] = uc->regs[13]; /* SP */ in arm_local_resume()
[all …]
/external/google-breakpad/src/client/linux/dump_writer_common/
Dthread_info.cc62 return regs.eip; in GetInstructionPointer()
77 out->gs = regs.xgs; in FillCPUContext()
78 out->fs = regs.xfs; in FillCPUContext()
79 out->es = regs.xes; in FillCPUContext()
80 out->ds = regs.xds; in FillCPUContext()
82 out->edi = regs.edi; in FillCPUContext()
83 out->esi = regs.esi; in FillCPUContext()
84 out->ebx = regs.ebx; in FillCPUContext()
85 out->edx = regs.edx; in FillCPUContext()
86 out->ecx = regs.ecx; in FillCPUContext()
[all …]
/external/u-boot/arch/mips/mach-ath79/qca953x/
Dddr.c221 void __iomem *regs; in ddr_init() local
224 regs = map_physmem(AR71XX_DDR_CTRL_BASE, AR71XX_DDR_CTRL_SIZE, in ddr_init()
228 writel(DDR_CTL_CONFIG_VAL, regs + QCA953X_DDR_REG_CTL_CONF); in ddr_init()
232 writel(0xffff, regs + AR71XX_DDR_REG_RD_CYCLE); in ddr_init()
236 writel(DDR_BURST_VAL, regs + QCA953X_DDR_REG_BURST); in ddr_init()
238 writel(DDR_BURST2_VAL, regs + QCA953X_DDR_REG_BURST2); in ddr_init()
242 writel(0xfffff, regs + QCA953X_DDR_REG_TIMEOUT_MAX); in ddr_init()
246 writel(DDR1_CONF_REG_VAL, regs + AR71XX_DDR_REG_CONFIG); in ddr_init()
248 writel(DDR1_CONF2_REG_VAL, regs + AR71XX_DDR_REG_CONFIG2); in ddr_init()
250 writel(DDR1_CONF3_REG_VAL, regs + QCA953X_DDR_REG_CONFIG3); in ddr_init()
[all …]
/external/u-boot/drivers/usb/gadget/
Dfotg210.c51 struct fotg210_regs *regs; member
79 struct fotg210_regs *regs = chip->regs; in ep_reset() local
83 setbits_le32(&regs->iep[ep - 1], IEP_RESET); in ep_reset()
85 clrbits_le32(&regs->iep[ep - 1], IEP_RESET); in ep_reset()
87 clrbits_le32(&regs->iep[ep - 1], IEP_STALL); in ep_reset()
90 setbits_le32(&regs->oep[ep - 1], OEP_RESET); in ep_reset()
92 clrbits_le32(&regs->oep[ep - 1], OEP_RESET); in ep_reset()
94 clrbits_le32(&regs->oep[ep - 1], OEP_STALL); in ep_reset()
102 struct fotg210_regs *regs = chip->regs; in fotg210_reset() local
108 writel(DEVCTRL_EN, &regs->dev_ctrl); in fotg210_reset()
[all …]
/external/u-boot/drivers/video/exynos/
Dexynos_dp.c39 static int exynos_dp_init_dp(struct exynos_dp *regs) in exynos_dp_init_dp() argument
42 exynos_dp_reset(regs); in exynos_dp_init_dp()
45 exynos_dp_enable_sw_func(regs, DP_ENABLE); in exynos_dp_init_dp()
47 ret = exynos_dp_init_analog_func(regs); in exynos_dp_init_dp()
51 exynos_dp_init_hpd(regs); in exynos_dp_init_dp()
52 exynos_dp_init_aux(regs); in exynos_dp_init_dp()
68 static unsigned int exynos_dp_read_edid(struct exynos_dp *regs) in exynos_dp_read_edid() argument
83 exynos_dp_read_byte_from_i2c(regs, I2C_EDID_DEVICE_ADDR, in exynos_dp_read_edid()
90 retval = exynos_dp_read_bytes_from_i2c(regs, in exynos_dp_read_edid()
106 retval = exynos_dp_read_bytes_from_i2c(regs, in exynos_dp_read_edid()
[all …]

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