/external/u-boot/arch/arm/mach-tegra/tegra114/ |
D | cpu.c | 168 reset_set_enable(PERIPH_ID_CACHE2, 0); in t114_init_clocks() 169 reset_set_enable(PERIPH_ID_GPIO, 0); in t114_init_clocks() 170 reset_set_enable(PERIPH_ID_TMR, 0); in t114_init_clocks() 171 reset_set_enable(PERIPH_ID_COP, 0); in t114_init_clocks() 172 reset_set_enable(PERIPH_ID_EMC, 0); in t114_init_clocks() 173 reset_set_enable(PERIPH_ID_I2C5, 0); in t114_init_clocks() 174 reset_set_enable(PERIPH_ID_FUSE, 0); in t114_init_clocks() 175 reset_set_enable(PERIPH_ID_APBDMA, 0); in t114_init_clocks() 176 reset_set_enable(PERIPH_ID_MEM, 0); in t114_init_clocks() 177 reset_set_enable(PERIPH_ID_CORESIGHT, 0); in t114_init_clocks() [all …]
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D | clock.c | 595 void reset_set_enable(enum periph_id periph_id, int enable) in reset_set_enable() function
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/external/u-boot/arch/arm/mach-tegra/tegra124/ |
D | cpu.c | 179 reset_set_enable(PERIPH_ID_CACHE2, 0); in tegra124_init_clocks() 180 reset_set_enable(PERIPH_ID_GPIO, 0); in tegra124_init_clocks() 181 reset_set_enable(PERIPH_ID_TMR, 0); in tegra124_init_clocks() 182 reset_set_enable(PERIPH_ID_COP, 0); in tegra124_init_clocks() 183 reset_set_enable(PERIPH_ID_EMC, 0); in tegra124_init_clocks() 184 reset_set_enable(PERIPH_ID_I2C5, 0); in tegra124_init_clocks() 185 reset_set_enable(PERIPH_ID_APBDMA, 0); in tegra124_init_clocks() 186 reset_set_enable(PERIPH_ID_MEM, 0); in tegra124_init_clocks() 187 reset_set_enable(PERIPH_ID_CORESIGHT, 0); in tegra124_init_clocks() 188 reset_set_enable(PERIPH_ID_MSELECT, 0); in tegra124_init_clocks() [all …]
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D | clock.c | 743 void reset_set_enable(enum periph_id periph_id, int enable) in reset_set_enable() function
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/external/u-boot/arch/arm/mach-tegra/tegra30/ |
D | cpu.c | 104 reset_set_enable(PERIPH_ID_DVC_I2C, 1); in t30_init_clocks() 106 reset_set_enable(PERIPH_ID_MSELECT, 1); in t30_init_clocks() 124 reset_set_enable(PERIPH_ID_DVC_I2C, 0); in t30_init_clocks() 125 reset_set_enable(PERIPH_ID_MSELECT, 0); in t30_init_clocks()
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D | clock.c | 575 void reset_set_enable(enum periph_id periph_id, int enable) in reset_set_enable() function
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/external/u-boot/drivers/reset/ |
D | tegra-car-reset.c | 37 reset_set_enable(reset_ctl->id, 1); in tegra_car_reset_assert() 47 reset_set_enable(reset_ctl->id, 0); in tegra_car_reset_deassert()
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/external/u-boot/arch/arm/mach-tegra/ |
D | powergate.c | 100 reset_set_enable(periph, 1); in tegra_powergate_sequence_power_up() 116 reset_set_enable(periph, 0); in tegra_powergate_sequence_power_up()
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D | clock.c | 478 reset_set_enable(periph_id, 1); in clock_start_periph_pll() 484 reset_set_enable(periph_id, 0); in clock_start_periph_pll() 501 reset_set_enable(periph_id, 1); in reset_periph() 505 reset_set_enable(periph_id, 0); in reset_periph() 645 reset_set_enable(periph_id, 1); in clock_ll_start_uart() 653 reset_set_enable(periph_id, 0); in clock_ll_start_uart()
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D | cpu.c | 374 reset_set_enable(PERIPH_ID_CPU, reset); in reset_A9_cpu() 383 reset_set_enable(PERIPH_ID_CORESIGHT, !enable); in clock_enable_coresight()
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D | xusb-padctl-common.c | 296 reset_set_enable(PERIPH_ID_XUSB_PADCTL, 0); in tegra_xusb_process_nodes()
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/external/u-boot/drivers/video/tegra124/ |
D | display.c | 442 reset_set_enable(PERIPH_ID_HOST1X, 0); in tegra124_lcd_init() 443 reset_set_enable(PERIPH_ID_DISP1, 0); in tegra124_lcd_init() 444 reset_set_enable(PERIPH_ID_PWM, 0); in tegra124_lcd_init() 445 reset_set_enable(PERIPH_ID_DPAUX, 0); in tegra124_lcd_init() 446 reset_set_enable(PERIPH_ID_SOR0, 0); in tegra124_lcd_init()
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/external/u-boot/drivers/pci/ |
D | pci_tegra.c | 613 reset_set_enable(PERIPH_ID_PCIEXCLK, 1); in tegra_pcie_power_on() 614 reset_set_enable(PERIPH_ID_AFI, 1); in tegra_pcie_power_on() 615 reset_set_enable(PERIPH_ID_PCIE, 1); in tegra_pcie_power_on() 631 reset_set_enable(PERIPH_ID_AFI, 0); in tegra_pcie_power_on() 783 reset_set_enable(PERIPH_ID_PCIEXCLK, 0);
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/external/u-boot/board/nvidia/nyan-big/ |
D | nyan-big.c | 118 reset_set_enable(ids[i], 0); in enable_required_clocks()
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/external/u-boot/arch/arm/mach-tegra/tegra210/ |
D | xusb-padctl.c | 161 reset_set_enable(PERIPH_ID_PEX_USB_UPHY, 0); in phy_prepare() 168 reset_set_enable(PERIPH_ID_PEX_USB_UPHY, 1); in phy_unprepare()
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D | clock.c | 836 void reset_set_enable(enum periph_id periph_id, int enable) in reset_set_enable() function
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/external/u-boot/arch/arm/include/asm/arch-tegra/ |
D | clock.h | 128 void reset_set_enable(enum periph_id periph_id, int enable);
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/external/u-boot/arch/arm/mach-tegra/tegra20/ |
D | clock.c | 524 void reset_set_enable(enum periph_id periph_id, int enable) in reset_set_enable() function
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/external/u-boot/drivers/usb/host/ |
D | ehci-tegra.c | 452 reset_set_enable(PERIPH_ID_USBD, 0); in init_utmi_usb_controller()
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