| /external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/ARM/ |
| D | fast-isel-ret.ll | 35 define signext i16 @ret4(i16 signext %a) nounwind uwtable ssp {
37 ; CHECK: ret4
|
| /external/llvm/test/CodeGen/ARM/ |
| D | fast-isel-ret.ll | 35 define signext i16 @ret4(i16 signext %a) nounwind uwtable ssp {
37 ; CHECK: ret4
|
| /external/libcxx/test/std/input.output/filesystems/class.path/path.member/ |
| D | path.compare.pass.cpp | 100 int ret4 = normalize_ret(p1.compare(RV)); in test_compare_basic() local
105 ASSERT_EQ(ret1, ret4); in test_compare_basic()
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/PowerPC/ |
| D | fast-isel-ret.ll | 55 define signext i16 @ret4(i16 signext %a) nounwind {
57 ; ELF64-LABEL: ret4
|
| D | ppc64-i128-abi.ll | 268 ; %ret4 = call i128 @i128_increment_by_val(i128 %tmp2, i128 %tmp2)
|
| /external/llvm/test/CodeGen/PowerPC/ |
| D | fast-isel-ret.ll | 55 define signext i16 @ret4(i16 signext %a) nounwind {
57 ; ELF64-LABEL: ret4
|
| D | ppc64-i128-abi.ll | 224 ; %ret4 = call i128 @i128_increment_by_val(i128 %tmp2, i128 %tmp2)
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/SystemZ/ |
| D | bswap-03.ll | 121 %ret4 = add i64 %ret3, %swapped4
122 %ret5 = add i64 %ret4, %swapped5
|
| D | bswap-02.ll | 121 %ret4 = add i32 %ret3, %swapped4
122 %ret5 = add i32 %ret4, %swapped5
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/X86/ |
| D | var-permute-512.ll | 31 %ret4 = insertelement <8 x i64> %ret3, i64 %v4, i32 4
32 %ret5 = insertelement <8 x i64> %ret4, i64 %v5, i32 5
79 %ret4 = insertelement <16 x i32> %ret3, i32 %v4, i32 4
80 %ret5 = insertelement <16 x i32> %ret4, i32 %v5, i32 5
345 %ret4 = insertelement <32 x i16> %ret3, i16 %v4, i32 4
346 %ret5 = insertelement <32 x i16> %ret4, i16 %v5, i32 5
851 %ret4 = insertelement <64 x i8> %ret3, i8 %v4, i32 4
852 %ret5 = insertelement <64 x i8> %ret4, i8 %v5, i32 5
939 %ret4 = insertelement <8 x double> %ret3, double %v4, i32 4
940 %ret5 = insertelement <8 x double> %ret4, double %v5, i32 5
[all …]
|
| D | var-permute-256.ll | 130 %ret4 = insertelement <8 x i32> %ret3, i32 %v4, i32 4
131 %ret5 = insertelement <8 x i32> %ret4, i32 %v5, i32 5
257 %ret4 = insertelement <16 x i16> %ret3, i16 %v4, i32 4
258 %ret5 = insertelement <16 x i16> %ret4, i16 %v5, i32 5
413 %ret4 = insertelement <32 x i8> %ret3, i8 %v4, i32 4
414 %ret5 = insertelement <32 x i8> %ret4, i8 %v5, i32 5
560 %ret4 = insertelement <8 x float> %ret3, float %v4, i32 4
561 %ret5 = insertelement <8 x float> %ret4, float %v5, i32 5
819 %ret4 = insertelement <16 x i16> %ret3, i16 %v4, i32 4
820 %ret5 = insertelement <16 x i16> %ret4, i16 %v5, i32 5
[all …]
|
| D | var-permute-128.ll | 219 %ret4 = insertelement <8 x i16> %ret3, i16 %v4, i32 4
220 %ret5 = insertelement <8 x i16> %ret4, i16 %v5, i32 5
362 %ret4 = insertelement <16 x i8> %ret3, i8 %v4, i32 4
363 %ret5 = insertelement <16 x i8> %ret4, i8 %v5, i32 5
627 %ret4 = insertelement <16 x i8> %ret3, i8 %v4, i32 4
628 %ret5 = insertelement <16 x i8> %ret4, i8 %v5, i32 5
1111 %ret4 = insertelement <16 x i8> %ret3, i8 %v4, i32 4
1112 %ret5 = insertelement <16 x i8> %ret4, i8 %v5, i32 5
|
| D | avx512bw-intrinsics-upgrade.ll | 1758 %ret4 = add i64 %ret3, %res4
1760 %ret5 = add i64 %ret4, %res5
1877 %ret4 = add i64 %ret3, %res4
1879 %ret5 = add i64 %ret4, %res5
1970 %ret4 = add i64 %ret3, %res4
1972 %ret5 = add i64 %ret4, %res5
2089 %ret4 = add i64 %ret3, %res4
2091 %ret5 = add i64 %ret4, %res5
2153 %ret4 = add i32 %ret3, %res4
2155 %ret5 = add i32 %ret4, %res5
[all …]
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/NVPTX/ |
| D | envreg.ll | 110 %ret4 = add i32 %ret3, %val5
111 %ret5 = add i32 %ret4, %val6
|
| /external/llvm/test/CodeGen/NVPTX/ |
| D | envreg.ll | 110 %ret4 = add i32 %ret3, %val5
111 %ret5 = add i32 %ret4, %val6
|
| /external/clang/test/SemaCUDA/ |
| D | function-overload.cu | 380 HostReturnTy2 ret4 = host_only_function(1.0f); in test_host_device_single_side_overloading() local
|
| /external/compiler-rt/test/dfsan/ |
| D | custom.cc | 536 int ret4 = inet_pton(AF_INET, addr4, &in4); in test_inet_pton() local
537 assert(ret4 == 1); in test_inet_pton()
|
| /external/llvm/test/CodeGen/X86/ |
| D | avx512bw-intrinsics.ll | 80 %ret4 = add i64 %ret3, %res4
82 %ret5 = add i64 %ret4, %res5
169 %ret4 = add i64 %ret3, %res4
171 %ret5 = add i64 %ret4, %res5
256 %ret4 = add i64 %ret3, %res4
258 %ret5 = add i64 %ret4, %res5
345 %ret4 = add i64 %ret3, %res4
347 %ret5 = add i64 %ret4, %res5
419 %ret4 = add i32 %ret3, %res4
421 %ret5 = add i32 %ret4, %res5
[all …]
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/ |
| D | SIRegisterInfo.td | 17 list<SubRegIndex> ret4 = [sub0, sub1, sub2, sub3];
26 !if(!eq(size, 4), ret4,
|