Searched refs:rev16 (Results 1 – 25 of 110) sorted by relevance
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| /external/llvm/test/CodeGen/ARM/ |
| D | bswap16.ll | 14 ; CHECK: rev16 r[[R1]], r[[R1]]
26 ; CHECK: rev16 r[[R1:[0-9]+]], r1
39 ; CHECK: rev16 r[[R0]], r0
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| D | rev.ll | 5 ; CHECK: rev16 r0, r0
75 ; CHECK: rev16 r0, r0
119 ; CHECK: rev16 r0, r0
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| /external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/ARM/ |
| D | bswap16.ll | 14 ; CHECK: rev16 r[[R1]], r[[R1]]
26 ; CHECK: rev16 r[[R1:[0-9]+]], r1
39 ; CHECK: rev16 r[[R0]], r0
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| D | rev.ll | 5 ; CHECK: rev16 r0, r0
75 ; CHECK: rev16 r0, r0
119 ; CHECK: rev16 r0, r0
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| /external/swiftshader/third_party/LLVM/test/CodeGen/Thumb2/ |
| D | thumb2-rev16.ll | 2 ; fixme rev16 pattern is not matching
4 ; RUN: llc < %s -march=thumb -mattr=+thumb2 | grep {rev16\\W*r\[0-9\]*,\\W*r\[0-9\]*} | count 1
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| D | 2010-04-26-CopyRegCrash.ll | 54 %asmtmp.i.i179 = tail call i16 asm "rev16 $0, $1\0A", "=l,l"(i16 undef) nounwind ; <i16> [#uses=1]
55 …%asmtmp.i.i178 = tail call i16 asm "rev16 $0, $1\0A", "=l,l"(i16 %asmtmp.i.i179) nounwind ; <i16> …
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| /external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/Thumb2/ |
| D | thumb2-rev16.ll | 2 ; fixme rev16 pattern is not matching
4 ; RUN: llc < %s -mtriple=thumb-- -mcpu=arm1156t2-s -mattr=+thumb2 | grep "rev16\W*r[0-9]*,\W*r[0-9]…
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| D | 2010-04-26-CopyRegCrash.ll | 54 %asmtmp.i.i179 = tail call i16 asm "rev16 $0, $1\0A", "=l,l"(i16 undef) nounwind ; <i16> [#uses=1]
55 …%asmtmp.i.i178 = tail call i16 asm "rev16 $0, $1\0A", "=l,l"(i16 %asmtmp.i.i179) nounwind ; <i16> …
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| /external/llvm/test/CodeGen/Thumb2/ |
| D | thumb2-rev16.ll | 2 ; fixme rev16 pattern is not matching
4 ; RUN: llc < %s -march=thumb -mcpu=arm1156t2-s -mattr=+thumb2 | grep "rev16\W*r[0-9]*,\W*r[0-9]*" |…
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| D | 2010-04-26-CopyRegCrash.ll | 54 %asmtmp.i.i179 = tail call i16 asm "rev16 $0, $1\0A", "=l,l"(i16 undef) nounwind ; <i16> [#uses=1]
55 …%asmtmp.i.i178 = tail call i16 asm "rev16 $0, $1\0A", "=l,l"(i16 %asmtmp.i.i179) nounwind ; <i16> …
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| /external/llvm/test/CodeGen/AArch64/ |
| D | arm64-rev.ll | 20 ; of %a are zero. This optimizes rev + lsr 16 to rev16.
25 ; CHECK: rev16 w0, [[REG]]
52 ; CHECK: rev16 w0, w0
68 ; 01234567 ->(rev16) 10325476
72 ; CHECK-NOT: rev16 x0, x0
189 ;CHECK: rev16.8b
197 ;CHECK: rev16.16b
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| /external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/AArch64/ |
| D | arm64-rev.ll | 20 ; of %a are zero. This optimizes rev + lsr 16 to rev16.
25 ; CHECK: rev16 w0, [[REG]]
52 ; CHECK: rev16 w0, w0
68 ; 01234567 ->(rev16) 10325476
72 ; CHECK-NOT: rev16 x0, x0
189 ;CHECK: rev16.8b
197 ;CHECK: rev16.16b
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| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/ARM/ |
| D | thumb.s | 19 rev16 r3, r4
22 @ CHECK: rev16 r3, r4 @ encoding: [0x63,0xba]
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| /external/llvm/test/MC/ARM/ |
| D | thumb.s | 19 rev16 r3, r4
22 @ CHECK: rev16 r3, r4 @ encoding: [0x63,0xba]
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| /external/swiftshader/third_party/LLVM/test/MC/ARM/ |
| D | thumb.s | 19 rev16 r3, r4
22 @ CHECK: rev16 r3, r4 @ encoding: [0x63,0xba]
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| D | basic-thumb-instructions.s | 424 rev16 r7, r2
428 @ CHECK: rev16 r7, r2 @ encoding: [0x57,0xba]
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| /external/capstone/suite/MC/ARM/ |
| D | thumb.s.cs | 8 0x63,0xba = rev16 r3, r4
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| D | basic-thumb-instructions.s.cs | 92 0x57,0xba = rev16 r7, r2
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| /external/swiftshader/third_party/LLVM/test/CodeGen/ARM/ |
| D | rev.ll | 5 ; CHECK: rev16 r0, r0
75 ; CHECK: rev16 r0, r0
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| /external/swiftshader/third_party/LLVM/test/CodeGen/Thumb/ |
| D | rev.ll | 5 ; CHECK: rev16 r0, r0
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| /external/llvm/test/CodeGen/Thumb/ |
| D | rev.ll | 5 ; CHECK: rev16 r0, r0
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| /external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/Thumb/ |
| D | rev.ll | 5 ; CHECK: rev16 r0, r0
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| /external/capstone/suite/MC/AArch64/ |
| D | neon-simd-misc.s.cs | 12 0xfe,0x1b,0x20,0x4e = rev16 v30.16b, v31.16b
13 0x35,0x18,0x20,0x0e = rev16 v21.8b, v1.8b
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| /external/llvm/test/MC/AArch64/ |
| D | neon-simd-misc.s | 33 rev16 v30.16b, v31.16b
34 rev16 v21.8b, v1.8b
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| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/AArch64/ |
| D | neon-simd-misc.s | 33 rev16 v30.16b, v31.16b
34 rev16 v21.8b, v1.8b
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