/external/libhevc/common/arm64/ |
D | ihevc_intra_pred_chroma_mode2.s | 126 rev64 v16.8b, v0.8b 127 rev64 v17.8b, v1.8b 144 rev64 v18.8b, v2.8b 145 rev64 v19.8b, v3.8b 148 rev64 v20.8b, v4.8b 149 rev64 v21.8b, v5.8b 152 rev64 v22.8b, v6.8b 153 rev64 v23.8b, v7.8b 155 rev64 v24.8b, v8.8b 156 rev64 v25.8b, v9.8b [all …]
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D | ihevc_intra_pred_luma_mode2.s | 141 rev64 v16.8b, v0.8b 142 rev64 v17.8b, v1.8b 145 rev64 v18.8b, v2.8b 146 rev64 v19.8b, v3.8b 149 rev64 v20.8b, v4.8b 152 rev64 v21.8b, v5.8b 153 rev64 v22.8b, v6.8b 154 rev64 v23.8b, v7.8b 204 rev64 v16.8b, v0.8b 207 rev64 v17.8b, v1.8b [all …]
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D | ihevc_intra_pred_filters_chroma_mode_11_to_17.s | 145 rev64 v0.4h, v0.4h 166 rev64 v6.4h, v6.4h 167 rev64 v5.4h, v5.4h 168 rev64 v4.4h, v4.4h 169 rev64 v3.4h, v3.4h 170 rev64 v2.4h, v2.4h 171 rev64 v1.4h, v1.4h 172 rev64 v0.4h, v0.4h 189 rev64 v2.4h, v2.4h 190 rev64 v1.4h, v1.4h [all …]
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D | ihevc_intra_pred_filters_luma_mode_11_to_17.s | 181 rev64 v0.8b, v0.8b 182 rev64 v1.8b, v1.8b 184 rev64 v2.8b, v2.8b 186 rev64 v3.8b, v3.8b 197 rev64 v0.8b, v0.8b 198 rev64 v1.8b, v1.8b 207 rev64 v0.8b, v0.8b
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/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/AArch64/ |
D | arm64-big-endian-vector-callee.ll | 24 ; CHECK: rev64 v{{[0-9]+}}.2s 33 ; CHECK: rev64 v{{[0-9]+}}.2s 42 ; CHECK: rev64 v{{[0-9]+}}.4h 51 ; CHECK: rev64 v{{[0-9]+}}.8b 78 ; CHECK: rev64 v{{[0-9]+}}.2s 87 ; CHECK: rev64 v{{[0-9]+}}.2s 96 ; CHECK: rev64 v{{[0-9]+}}.4h 105 ; CHECK: rev64 v{{[0-9]+}}.8b 132 ; CHECK: rev64 v{{[0-9]+}}.2s 141 ; CHECK: rev64 v{{[0-9]+}}.2s [all …]
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D | arm64-big-endian-vector-caller.ll | 39 ; CHECK: rev64 v{{[0-9]+}}.2s 53 ; CHECK: rev64 v{{[0-9]+}}.2s 67 ; CHECK: rev64 v{{[0-9]+}}.4h 81 ; CHECK: rev64 v{{[0-9]+}}.8b 123 ; CHECK: rev64 v{{[0-9]+}}.2s 137 ; CHECK: rev64 v{{[0-9]+}}.2s 151 ; CHECK: rev64 v{{[0-9]+}}.4h 165 ; CHECK: rev64 v{{[0-9]+}}.8b 207 ; CHECK: rev64 v{{[0-9]+}}.2s 221 ; CHECK: rev64 v{{[0-9]+}}.2s [all …]
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D | aarch64-be-bv.ll | 389 ; CHECK-NEXT: rev64 v{{[0-9]+}}.8b, v[[REG1]].8b 393 ; CHECK-NEXT: rev64 v{{[0-9]+}}.4h, v[[REG1]].4h 397 ; CHECK-NEXT: rev64 v{{[0-9]+}}.2s, v[[REG1]].2s 404 ; CHECK-NEXT: rev64 v[[REG2:[0-9]+]].16b, v[[REG1]].16b 409 ; CHECK-NEXT: rev64 v[[REG2:[0-9]+]].8h, v[[REG1]].8h 414 ; CHECK-NEXT: rev64 v[[REG2:[0-9]+]].4s, v[[REG1]].4s 429 ; CHECK-NEXT: rev64 v{{[0-9]+}}.8b, v[[REG1]].8b 433 ; CHECK-NEXT: rev64 v{{[0-9]+}}.4h, v[[REG1]].4h 437 ; CHECK-NEXT: rev64 v{{[0-9]+}}.2s, v[[REG1]].2s 444 ; CHECK-NEXT: rev64 v[[REG2:[0-9]+]].16b, v[[REG1]].16b [all …]
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D | arm64-big-endian-bitconverts.ll | 31 ; CHECK: rev64 v{{[0-9]+}}.2s 44 ; CHECK: rev64 v{{[0-9]+}}.2s 59 ; CHECK: rev64 v{{[0-9]+}}.4h 72 ; CHECK: rev64 v{{[0-9]+}}.4h 85 ; CHECK: rev64 v{{[0-9]+}}.8b 122 ; CHECK: rev64 v{{[0-9]+}}.2s 135 ; CHECK: rev64 v{{[0-9]+}}.2s 148 ; CHECK: rev64 v{{[0-9]+}}.4h 163 ; CHECK: rev64 v{{[0-9]+}}.4h 177 ; CHECK: rev64 v{{[0-9]+}}.8b [all …]
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D | arm64-rev.ll | 93 ;CHECK: rev64.8b 101 ;CHECK: rev64.4h 109 ;CHECK: rev64.2s 117 ;CHECK: rev64.2s 125 ;CHECK: rev64.16b 133 ;CHECK: rev64.8h 141 ;CHECK: rev64.4s 149 ;CHECK: rev64.4s 207 ;CHECK: rev64.8b 242 ; CHECK: rev64.4s
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/external/llvm/test/CodeGen/AArch64/ |
D | arm64-big-endian-vector-callee.ll | 24 ; CHECK: rev64 v{{[0-9]+}}.2s 33 ; CHECK: rev64 v{{[0-9]+}}.2s 42 ; CHECK: rev64 v{{[0-9]+}}.4h 51 ; CHECK: rev64 v{{[0-9]+}}.8b 78 ; CHECK: rev64 v{{[0-9]+}}.2s 87 ; CHECK: rev64 v{{[0-9]+}}.2s 96 ; CHECK: rev64 v{{[0-9]+}}.4h 105 ; CHECK: rev64 v{{[0-9]+}}.8b 132 ; CHECK: rev64 v{{[0-9]+}}.2s 141 ; CHECK: rev64 v{{[0-9]+}}.2s [all …]
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D | arm64-big-endian-vector-caller.ll | 39 ; CHECK: rev64 v{{[0-9]+}}.2s 53 ; CHECK: rev64 v{{[0-9]+}}.2s 67 ; CHECK: rev64 v{{[0-9]+}}.4h 81 ; CHECK: rev64 v{{[0-9]+}}.8b 123 ; CHECK: rev64 v{{[0-9]+}}.2s 137 ; CHECK: rev64 v{{[0-9]+}}.2s 151 ; CHECK: rev64 v{{[0-9]+}}.4h 165 ; CHECK: rev64 v{{[0-9]+}}.8b 207 ; CHECK: rev64 v{{[0-9]+}}.2s 221 ; CHECK: rev64 v{{[0-9]+}}.2s [all …]
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D | arm64-big-endian-bitconverts.ll | 31 ; CHECK: rev64 v{{[0-9]+}}.2s 44 ; CHECK: rev64 v{{[0-9]+}}.2s 57 ; CHECK: rev64 v{{[0-9]+}}.4h 70 ; CHECK: rev64 v{{[0-9]+}}.8b 107 ; CHECK: rev64 v{{[0-9]+}}.2s 120 ; CHECK: rev64 v{{[0-9]+}}.2s 133 ; CHECK: rev64 v{{[0-9]+}}.4h 146 ; CHECK: rev64 v{{[0-9]+}}.8b 183 ; CHECK: rev64 v{{[0-9]+}}.2s 196 ; CHECK: rev64 v{{[0-9]+}}.2s [all …]
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D | aarch64-be-bv.ll | 389 ; CHECK-NEXT: rev64 v{{[0-9]+}}.8b, v[[REG1]].8b 393 ; CHECK-NEXT: rev64 v{{[0-9]+}}.4h, v[[REG1]].4h 397 ; CHECK-NEXT: rev64 v{{[0-9]+}}.2s, v[[REG1]].2s 404 ; CHECK-NEXT: rev64 v[[REG2:[0-9]+]].16b, v[[REG1]].16b 409 ; CHECK-NEXT: rev64 v[[REG2:[0-9]+]].8h, v[[REG1]].8h 414 ; CHECK-NEXT: rev64 v[[REG2:[0-9]+]].4s, v[[REG1]].4s 429 ; CHECK-NEXT: rev64 v{{[0-9]+}}.8b, v[[REG1]].8b 433 ; CHECK-NEXT: rev64 v{{[0-9]+}}.4h, v[[REG1]].4h 437 ; CHECK-NEXT: rev64 v{{[0-9]+}}.2s, v[[REG1]].2s 444 ; CHECK-NEXT: rev64 v[[REG2:[0-9]+]].16b, v[[REG1]].16b [all …]
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D | arm64-rev.ll | 93 ;CHECK: rev64.8b 101 ;CHECK: rev64.4h 109 ;CHECK: rev64.2s 117 ;CHECK: rev64.2s 125 ;CHECK: rev64.16b 133 ;CHECK: rev64.8h 141 ;CHECK: rev64.4s 149 ;CHECK: rev64.4s 207 ;CHECK: rev64.8b 242 ; CHECK: rev64.4s
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/external/libxaac/decoder/armv8/ |
D | ixheaacd_pre_twiddle.s | 163 rev64 v10.4h, v8.4h 164 rev64 v11.4h, v9.4h 170 rev64 v0.4h, v0.4h 171 rev64 v1.4h, v1.4h 172 rev64 v4.4h, v4.4h 173 rev64 v5.4h, v5.4h 225 rev64 v10.4h, v8.4h 226 rev64 v11.4h, v9.4h 235 rev64 v0.4h, v0.4h 236 rev64 v1.4h, v1.4h [all …]
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D | ixheaacd_post_twiddle.s | 147 rev64 v12.4h, v8.4h 148 rev64 v13.4h, v9.4h 213 rev64 v12.4h, v8.4h 214 rev64 v13.4h, v9.4h 245 rev64 v14.4s, v14.4s 260 rev64 v24.4s, v24.4s 342 rev64 v12.4h, v8.4h 343 rev64 v13.4h, v9.4h 373 rev64 v14.4s, v14.4s 389 rev64 v24.4s, v24.4s [all …]
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D | ixheaacd_cos_sin_mod_loop1.s | 56 rev64 v1.2s, v0.2s 93 rev64 v1.2s, v0.2s 130 rev64 v1.2s, v0.2s 166 rev64 v1.2s, v0.2s
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D | ixheaacd_overlap_add2.s | 220 rev64 v9.4s, v9.4s 221 rev64 v8.4s, v8.4s 269 rev64 v9.4s, v9.4s 270 rev64 v8.4s, v8.4s
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/external/boringssl/ios-aarch64/crypto/fipsmodule/ |
D | ghashv8-armx64.S | 79 rev64 v17.16b,v17.16b 104 rev64 v0.16b,v0.16b 140 rev64 v16.16b,v16.16b 141 rev64 v0.16b,v0.16b 147 rev64 v17.16b,v17.16b 179 rev64 v16.16b,v16.16b 185 rev64 v17.16b,v17.16b 235 rev64 v0.16b,v0.16b
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D | ghash-neon-armv8.S | 52 rev64 v3.16b, v3.16b // byteswap Xi 71 rev64 v0.16b, v0.16b // byteswap Xi 77 rev64 v3.16b, v3.16b // byteswap inp 320 rev64 v0.16b, v0.16b // byteswap Xi and write
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/external/boringssl/linux-aarch64/crypto/fipsmodule/ |
D | ghashv8-armx64.S | 80 rev64 v17.16b,v17.16b 105 rev64 v0.16b,v0.16b 141 rev64 v16.16b,v16.16b 142 rev64 v0.16b,v0.16b 148 rev64 v17.16b,v17.16b 180 rev64 v16.16b,v16.16b 186 rev64 v17.16b,v17.16b 236 rev64 v0.16b,v0.16b
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D | ghash-neon-armv8.S | 53 rev64 v3.16b, v3.16b // byteswap Xi 72 rev64 v0.16b, v0.16b // byteswap Xi 78 rev64 v3.16b, v3.16b // byteswap inp 321 rev64 v0.16b, v0.16b // byteswap Xi and write
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/external/capstone/suite/MC/AArch64/ |
D | neon-simd-misc.s.cs | 2 0xe0,0x0b,0x20,0x4e = rev64 v0.16b, v31.16b 3 0x82,0x08,0x60,0x4e = rev64 v2.8h, v4.8h 4 0x06,0x09,0xa0,0x4e = rev64 v6.4s, v8.4s 5 0x21,0x09,0x20,0x0e = rev64 v1.8b, v9.8b 6 0xad,0x0a,0x60,0x0e = rev64 v13.4h, v21.4h 7 0x04,0x08,0xa0,0x0e = rev64 v4.2s, v0.2s
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/external/llvm/test/MC/AArch64/ |
D | neon-simd-misc.s | 9 rev64 v0.16b, v31.16b 10 rev64 v2.8h, v4.8h 11 rev64 v6.4s, v8.4s 12 rev64 v1.8b, v9.8b 13 rev64 v13.4h, v21.4h 14 rev64 v4.2s, v0.2s
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/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/AArch64/ |
D | neon-simd-misc.s | 9 rev64 v0.16b, v31.16b 10 rev64 v2.8h, v4.8h 11 rev64 v6.4s, v8.4s 12 rev64 v1.8b, v9.8b 13 rev64 v13.4h, v21.4h 14 rev64 v4.2s, v0.2s
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