/external/libdrm/freedreno/ |
D | freedreno_ringbuffer.c | 38 struct fd_ringbuffer *ring; in fd_ringbuffer_new() local 40 ring = pipe->funcs->ringbuffer_new(pipe, size); in fd_ringbuffer_new() 41 if (!ring) in fd_ringbuffer_new() 44 ring->pipe = pipe; in fd_ringbuffer_new() 45 ring->start = ring->funcs->hostptr(ring); in fd_ringbuffer_new() 46 ring->end = &(ring->start[ring->size/4]); in fd_ringbuffer_new() 48 ring->cur = ring->last_start = ring->start; in fd_ringbuffer_new() 50 return ring; in fd_ringbuffer_new() 53 void fd_ringbuffer_del(struct fd_ringbuffer *ring) in fd_ringbuffer_del() argument 55 fd_ringbuffer_reset(ring); in fd_ringbuffer_del() [all …]
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/external/mesa3d/src/gallium/drivers/freedreno/a5xx/ |
D | fd5_emit.c | 53 fd5_emit_const(struct fd_ringbuffer *ring, enum shader_t type, in fd5_emit_const() argument 71 OUT_PKT7(ring, CP_LOAD_STATE4, 3 + sz); in fd5_emit_const() 72 OUT_RING(ring, CP_LOAD_STATE4_0_DST_OFF(regid/4) | in fd5_emit_const() 78 OUT_RELOC(ring, bo, offset, in fd5_emit_const() 81 OUT_RING(ring, CP_LOAD_STATE4_1_EXT_SRC_ADDR(0) | in fd5_emit_const() 83 OUT_RING(ring, CP_LOAD_STATE4_2_EXT_SRC_ADDR_HI(0)); in fd5_emit_const() 87 OUT_RING(ring, dwords[i]); in fd5_emit_const() 92 fd5_emit_const_bo(struct fd_ringbuffer *ring, enum shader_t type, boolean write, in fd5_emit_const_bo() argument 100 OUT_PKT7(ring, CP_LOAD_STATE4, 3 + (2 * anum)); in fd5_emit_const_bo() 101 OUT_RING(ring, CP_LOAD_STATE4_0_DST_OFF(regid/4) | in fd5_emit_const_bo() [all …]
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D | fd5_gmem.c | 46 emit_mrt(struct fd_ringbuffer *ring, unsigned nr_bufs, in emit_mrt() argument 100 OUT_PKT4(ring, REG_A5XX_RB_MRT_BUF_INFO(i), 5); in emit_mrt() 101 OUT_RING(ring, A5XX_RB_MRT_BUF_INFO_COLOR_FORMAT(format) | in emit_mrt() 106 OUT_RING(ring, A5XX_RB_MRT_PITCH(stride)); in emit_mrt() 107 OUT_RING(ring, A5XX_RB_MRT_ARRAY_PITCH(size)); in emit_mrt() 109 OUT_RING(ring, base); /* RB_MRT[i].BASE_LO */ in emit_mrt() 110 OUT_RING(ring, 0x00000000); /* RB_MRT[i].BASE_HI */ in emit_mrt() 113 OUT_RELOCW(ring, rsc->bo, offset, 0, 0); /* BASE_LO/HI */ in emit_mrt() 116 OUT_PKT4(ring, REG_A5XX_SP_FS_MRT_REG(i), 1); in emit_mrt() 117 OUT_RING(ring, A5XX_SP_FS_MRT_REG_COLOR_FORMAT(format) | in emit_mrt() [all …]
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D | fd5_compute.c | 61 cs_program_emit(struct fd_ringbuffer *ring, struct ir3_shader_variant *v) in cs_program_emit() argument 69 OUT_PKT4(ring, REG_A5XX_SP_SP_CNTL, 1); in cs_program_emit() 70 OUT_RING(ring, 0x00000000); /* SP_SP_CNTL */ in cs_program_emit() 72 OUT_PKT4(ring, REG_A5XX_HLSQ_CONTROL_0_REG, 1); in cs_program_emit() 73 OUT_RING(ring, A5XX_HLSQ_CONTROL_0_REG_FSTHREADSIZE(TWO_QUADS) | in cs_program_emit() 77 OUT_PKT4(ring, REG_A5XX_SP_CS_CTRL_REG0, 1); in cs_program_emit() 78 OUT_RING(ring, A5XX_SP_CS_CTRL_REG0_THREADSIZE(thrsz) | in cs_program_emit() 84 OUT_PKT4(ring, REG_A5XX_HLSQ_CS_CONFIG, 1); in cs_program_emit() 85 OUT_RING(ring, A5XX_HLSQ_CS_CONFIG_CONSTOBJECTOFFSET(0) | in cs_program_emit() 89 OUT_PKT4(ring, REG_A5XX_HLSQ_CS_CNTL, 1); in cs_program_emit() [all …]
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D | fd5_blitter.c | 153 emit_setup(struct fd_ringbuffer *ring) in emit_setup() argument 155 OUT_PKT7(ring, CP_EVENT_WRITE, 1); in emit_setup() 156 OUT_RING(ring, LRZ_FLUSH); in emit_setup() 158 OUT_PKT7(ring, CP_SKIP_IB2_ENABLE_GLOBAL, 1); in emit_setup() 159 OUT_RING(ring, 0x0); in emit_setup() 161 OUT_PKT4(ring, REG_A5XX_PC_POWER_CNTL, 1); in emit_setup() 162 OUT_RING(ring, 0x00000003); /* PC_POWER_CNTL */ in emit_setup() 164 OUT_PKT4(ring, REG_A5XX_VFD_POWER_CNTL, 1); in emit_setup() 165 OUT_RING(ring, 0x00000003); /* VFD_POWER_CNTL */ in emit_setup() 168 OUT_WFI5(ring); in emit_setup() [all …]
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D | fd5_emit.h | 101 fd5_cache_flush(struct fd_batch *batch, struct fd_ringbuffer *ring) in fd5_cache_flush() argument 104 OUT_PKT4(ring, REG_A5XX_UCHE_CACHE_INVALIDATE_MIN_LO, 5); in fd5_cache_flush() 105 OUT_RING(ring, 0x00000000); /* UCHE_CACHE_INVALIDATE_MIN_LO */ in fd5_cache_flush() 106 OUT_RING(ring, 0x00000000); /* UCHE_CACHE_INVALIDATE_MIN_HI */ in fd5_cache_flush() 107 OUT_RING(ring, 0x00000000); /* UCHE_CACHE_INVALIDATE_MAX_LO */ in fd5_cache_flush() 108 OUT_RING(ring, 0x00000000); /* UCHE_CACHE_INVALIDATE_MAX_HI */ in fd5_cache_flush() 109 OUT_RING(ring, 0x00000012); /* UCHE_CACHE_INVALIDATE */ in fd5_cache_flush() 110 fd_wfi(batch, ring); in fd5_cache_flush() 114 fd5_set_render_mode(struct fd_context *ctx, struct fd_ringbuffer *ring, in fd5_set_render_mode() argument 118 emit_marker5(ring, 7); in fd5_set_render_mode() [all …]
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D | fd5_query.c | 57 struct fd_ringbuffer *ring = batch->draw; in occlusion_resume() local 59 OUT_PKT4(ring, REG_A5XX_RB_SAMPLE_COUNT_CONTROL, 1); in occlusion_resume() 60 OUT_RING(ring, A5XX_RB_SAMPLE_COUNT_CONTROL_COPY); in occlusion_resume() 62 OUT_PKT4(ring, REG_A5XX_RB_SAMPLE_COUNT_ADDR_LO, 2); in occlusion_resume() 63 OUT_RELOCW(ring, query_sample(aq, start)); in occlusion_resume() 65 OUT_PKT7(ring, CP_EVENT_WRITE, 1); in occlusion_resume() 66 OUT_RING(ring, ZPASS_DONE); in occlusion_resume() 75 struct fd_ringbuffer *ring = batch->draw; in occlusion_pause() local 77 OUT_PKT7(ring, CP_MEM_WRITE, 4); in occlusion_pause() 78 OUT_RELOCW(ring, query_sample(aq, stop)); in occlusion_pause() [all …]
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D | fd5_draw.c | 44 draw_impl(struct fd_context *ctx, struct fd_ringbuffer *ring, in draw_impl() argument 50 fd5_emit_state(ctx, ring, emit); in draw_impl() 53 fd5_emit_vertex_bufs(ring, emit); in draw_impl() 55 OUT_PKT4(ring, REG_A5XX_VFD_INDEX_OFFSET, 2); in draw_impl() 56 OUT_RING(ring, info->index_size ? info->index_bias : info->start); /* VFD_INDEX_OFFSET */ in draw_impl() 57 OUT_RING(ring, info->start_instance); /* VFD_INSTANCE_START_OFFSET */ in draw_impl() 59 OUT_PKT4(ring, REG_A5XX_PC_RESTART_INDEX, 1); in draw_impl() 60 OUT_RING(ring, info->primitive_restart ? /* PC_RESTART_INDEX */ in draw_impl() 64 fd5_draw_emit(ctx->batch, ring, primtype, in draw_impl() 157 struct fd_ringbuffer *ring = ctx->batch->draw; in fd5_draw_vbo() local [all …]
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D | fd5_program.c | 88 fd5_emit_shader(struct fd_ringbuffer *ring, const struct ir3_shader_variant *so) in fd5_emit_shader() argument 105 OUT_PKT7(ring, CP_LOAD_STATE4, 3 + sz); in fd5_emit_shader() 106 OUT_RING(ring, CP_LOAD_STATE4_0_DST_OFF(0) | in fd5_emit_shader() 111 OUT_RING(ring, CP_LOAD_STATE4_1_EXT_SRC_ADDR(0) | in fd5_emit_shader() 113 OUT_RING(ring, CP_LOAD_STATE4_2_EXT_SRC_ADDR_HI(0)); in fd5_emit_shader() 115 OUT_RELOC(ring, so->bo, 0, in fd5_emit_shader() 125 OUT_RING(ring, bin[i]); in fd5_emit_shader() 180 emit_stream_out(struct fd_ringbuffer *ring, const struct ir3_shader_variant *v, in emit_stream_out() argument 222 OUT_PKT7(ring, CP_CONTEXT_REG_BUNCH, 12 + (2 * ARRAY_SIZE(prog))); in emit_stream_out() 223 OUT_RING(ring, REG_A5XX_VPC_SO_BUF_CNTL); in emit_stream_out() [all …]
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D | fd5_image.c | 97 static void emit_image_tex(struct fd_ringbuffer *ring, unsigned slot, in emit_image_tex() argument 100 OUT_PKT7(ring, CP_LOAD_STATE4, 3 + 12); in emit_image_tex() 101 OUT_RING(ring, CP_LOAD_STATE4_0_DST_OFF(slot) | in emit_image_tex() 105 OUT_RING(ring, CP_LOAD_STATE4_1_STATE_TYPE(ST4_CONSTANTS) | in emit_image_tex() 107 OUT_RING(ring, CP_LOAD_STATE4_2_EXT_SRC_ADDR_HI(0)); in emit_image_tex() 109 OUT_RING(ring, A5XX_TEX_CONST_0_FMT(img->fmt) | in emit_image_tex() 113 OUT_RING(ring, A5XX_TEX_CONST_1_WIDTH(img->width) | in emit_image_tex() 115 OUT_RING(ring, A5XX_TEX_CONST_2_FETCHSIZE(img->fetchsize) | in emit_image_tex() 118 OUT_RING(ring, A5XX_TEX_CONST_3_ARRAY_PITCH(img->array_pitch)); in emit_image_tex() 120 OUT_RELOC(ring, img->bo, img->offset, in emit_image_tex() [all …]
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/external/mesa3d/src/gallium/drivers/freedreno/a2xx/ |
D | fd2_emit.c | 53 emit_constants(struct fd_ringbuffer *ring, uint32_t base, in emit_constants() argument 94 OUT_PKT3(ring, CP_SET_CONSTANT, size + 1); in emit_constants() 95 OUT_RING(ring, base); in emit_constants() 97 OUT_RING(ring, *(dwords++)); in emit_constants() 109 OUT_PKT3(ring, CP_SET_CONSTANT, 5); in emit_constants() 110 OUT_RING(ring, start_base + (4 * (shader->first_immediate + i))); in emit_constants() 111 OUT_RING(ring, shader->immediates[i].val[0]); in emit_constants() 112 OUT_RING(ring, shader->immediates[i].val[1]); in emit_constants() 113 OUT_RING(ring, shader->immediates[i].val[2]); in emit_constants() 114 OUT_RING(ring, shader->immediates[i].val[3]); in emit_constants() [all …]
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D | fd2_gmem.c | 68 struct fd_ringbuffer *ring = batch->gmem; in emit_gmem2mem_surf() local 72 OUT_PKT3(ring, CP_SET_CONSTANT, 2); in emit_gmem2mem_surf() 73 OUT_RING(ring, CP_REG(REG_A2XX_RB_COLOR_INFO)); in emit_gmem2mem_surf() 74 OUT_RING(ring, A2XX_RB_COLOR_INFO_SWAP(swap) | in emit_gmem2mem_surf() 78 OUT_PKT3(ring, CP_SET_CONSTANT, 5); in emit_gmem2mem_surf() 79 OUT_RING(ring, CP_REG(REG_A2XX_RB_COPY_CONTROL)); in emit_gmem2mem_surf() 80 OUT_RING(ring, 0x00000000); /* RB_COPY_CONTROL */ in emit_gmem2mem_surf() 81 OUT_RELOCW(ring, rsc->bo, 0, 0, 0); /* RB_COPY_DEST_BASE */ in emit_gmem2mem_surf() 82 OUT_RING(ring, rsc->slices[0].pitch >> 5); /* RB_COPY_DEST_PITCH */ in emit_gmem2mem_surf() 83 OUT_RING(ring, /* RB_COPY_DEST_INFO */ in emit_gmem2mem_surf() [all …]
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D | fd2_draw.c | 46 emit_cacheflush(struct fd_ringbuffer *ring) in emit_cacheflush() argument 51 OUT_PKT3(ring, CP_EVENT_WRITE, 1); in emit_cacheflush() 52 OUT_RING(ring, CACHE_FLUSH); in emit_cacheflush() 86 struct fd_ringbuffer *ring = ctx->batch->draw; in fd2_draw_vbo() local 93 OUT_PKT3(ring, CP_SET_CONSTANT, 2); in fd2_draw_vbo() 94 OUT_RING(ring, CP_REG(REG_A2XX_VGT_INDX_OFFSET)); in fd2_draw_vbo() 95 OUT_RING(ring, info->start); in fd2_draw_vbo() 97 OUT_PKT3(ring, CP_SET_CONSTANT, 2); in fd2_draw_vbo() 98 OUT_RING(ring, CP_REG(REG_A2XX_VGT_VERTEX_REUSE_BLOCK_CNTL)); in fd2_draw_vbo() 99 OUT_RING(ring, 0x0000003b); in fd2_draw_vbo() [all …]
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/external/mesa3d/src/gallium/drivers/freedreno/a3xx/ |
D | fd3_gmem.c | 47 emit_mrt(struct fd_ringbuffer *ring, unsigned nr_bufs, in emit_mrt() argument 111 OUT_PKT0(ring, REG_A3XX_RB_MRT_BUF_INFO(i), 2); in emit_mrt() 112 OUT_RING(ring, A3XX_RB_MRT_BUF_INFO_COLOR_FORMAT(format) | in emit_mrt() 118 OUT_RING(ring, A3XX_RB_MRT_BUF_BASE_COLOR_BUF_BASE(base)); in emit_mrt() 120 OUT_RELOCW(ring, rsc->bo, offset, 0, -1); in emit_mrt() 123 OUT_PKT0(ring, REG_A3XX_SP_FS_IMAGE_OUTPUT_REG(i), 1); in emit_mrt() 124 OUT_RING(ring, COND((i < nr_bufs) && bufs[i], in emit_mrt() 168 struct fd_ringbuffer *ring = batch->gmem; in emit_binning_workaround() local 178 OUT_PKT0(ring, REG_A3XX_RB_MODE_CONTROL, 2); in emit_binning_workaround() 179 OUT_RING(ring, A3XX_RB_MODE_CONTROL_RENDER_MODE(RB_RESOLVE_PASS) | in emit_binning_workaround() [all …]
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D | fd3_emit.c | 58 fd3_emit_const(struct fd_ringbuffer *ring, enum shader_t type, in fd3_emit_const() argument 76 OUT_PKT3(ring, CP_LOAD_STATE, 2 + sz); in fd3_emit_const() 77 OUT_RING(ring, CP_LOAD_STATE_0_DST_OFF(regid/2) | in fd3_emit_const() 83 OUT_RELOC(ring, bo, offset, in fd3_emit_const() 86 OUT_RING(ring, CP_LOAD_STATE_1_EXT_SRC_ADDR(0) | in fd3_emit_const() 91 OUT_RING(ring, dwords[i]); in fd3_emit_const() 96 fd3_emit_const_bo(struct fd_ringbuffer *ring, enum shader_t type, boolean write, in fd3_emit_const_bo() argument 104 OUT_PKT3(ring, CP_LOAD_STATE, 2 + anum); in fd3_emit_const_bo() 105 OUT_RING(ring, CP_LOAD_STATE_0_DST_OFF(regid/2) | in fd3_emit_const_bo() 109 OUT_RING(ring, CP_LOAD_STATE_1_EXT_SRC_ADDR(0) | in fd3_emit_const_bo() [all …]
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D | fd3_program.c | 104 emit_shader(struct fd_ringbuffer *ring, const struct ir3_shader_variant *so) in emit_shader() argument 127 OUT_PKT3(ring, CP_LOAD_STATE, 2 + sz); in emit_shader() 128 OUT_RING(ring, CP_LOAD_STATE_0_DST_OFF(0) | in emit_shader() 133 OUT_RING(ring, CP_LOAD_STATE_1_EXT_SRC_ADDR(0) | in emit_shader() 136 OUT_RELOC(ring, so->bo, 0, in emit_shader() 140 OUT_RING(ring, bin[i]); in emit_shader() 145 fd3_program_emit(struct fd_ringbuffer *ring, struct fd3_emit *emit, in fd3_program_emit() argument 231 OUT_PKT0(ring, REG_A3XX_HLSQ_CONTROL_0_REG, 6); in fd3_program_emit() 232 OUT_RING(ring, A3XX_HLSQ_CONTROL_0_REG_FSTHREADSIZE(FOUR_QUADS) | in fd3_program_emit() 240 OUT_RING(ring, A3XX_HLSQ_CONTROL_1_REG_VSTHREADSIZE(TWO_QUADS) | in fd3_program_emit() [all …]
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/external/mesa3d/src/gallium/drivers/freedreno/a4xx/ |
D | fd4_emit.c | 53 fd4_emit_const(struct fd_ringbuffer *ring, enum shader_t type, in fd4_emit_const() argument 71 OUT_PKT3(ring, CP_LOAD_STATE4, 2 + sz); in fd4_emit_const() 72 OUT_RING(ring, CP_LOAD_STATE4_0_DST_OFF(regid/4) | in fd4_emit_const() 78 OUT_RELOC(ring, bo, offset, in fd4_emit_const() 81 OUT_RING(ring, CP_LOAD_STATE4_1_EXT_SRC_ADDR(0) | in fd4_emit_const() 86 OUT_RING(ring, dwords[i]); in fd4_emit_const() 91 fd4_emit_const_bo(struct fd_ringbuffer *ring, enum shader_t type, boolean write, in fd4_emit_const_bo() argument 99 OUT_PKT3(ring, CP_LOAD_STATE4, 2 + anum); in fd4_emit_const_bo() 100 OUT_RING(ring, CP_LOAD_STATE4_0_DST_OFF(regid/4) | in fd4_emit_const_bo() 104 OUT_RING(ring, CP_LOAD_STATE4_1_EXT_SRC_ADDR(0) | in fd4_emit_const_bo() [all …]
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D | fd4_gmem.c | 48 emit_mrt(struct fd_ringbuffer *ring, unsigned nr_bufs, in emit_mrt() argument 114 OUT_PKT0(ring, REG_A4XX_RB_MRT_BUF_INFO(i), 3); in emit_mrt() 115 OUT_RING(ring, A4XX_RB_MRT_BUF_INFO_COLOR_FORMAT(format) | in emit_mrt() 121 OUT_RING(ring, base); in emit_mrt() 122 OUT_RING(ring, A4XX_RB_MRT_CONTROL3_STRIDE(stride)); in emit_mrt() 124 OUT_RELOCW(ring, rsc->bo, offset, 0, 0); in emit_mrt() 129 OUT_RING(ring, A4XX_RB_MRT_CONTROL3_STRIDE(0)); in emit_mrt() 154 struct fd_ringbuffer *ring = batch->gmem; in emit_gmem2mem_surf() local 172 OUT_PKT0(ring, REG_A4XX_RB_COPY_CONTROL, 4); in emit_gmem2mem_surf() 173 OUT_RING(ring, A4XX_RB_COPY_CONTROL_MSAA_RESOLVE(MSAA_ONE) | in emit_gmem2mem_surf() [all …]
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D | fd4_query.c | 51 occlusion_get_sample(struct fd_batch *batch, struct fd_ringbuffer *ring) in occlusion_get_sample() argument 64 OUT_PKT3(ring, CP_SET_CONSTANT, 3); in occlusion_get_sample() 65 OUT_RING(ring, CP_REG(REG_A4XX_RB_SAMPLE_COUNT_CONTROL) | 0x80000000); in occlusion_get_sample() 66 OUT_RING(ring, HW_QUERY_BASE_REG); in occlusion_get_sample() 67 OUT_RING(ring, A4XX_RB_SAMPLE_COUNT_CONTROL_COPY | in occlusion_get_sample() 70 OUT_PKT3(ring, CP_DRAW_INDX_OFFSET, 3); in occlusion_get_sample() 71 OUT_RING(ring, DRAW4(DI_PT_POINTLIST_PSIZE, DI_SRC_SEL_AUTO_INDEX, in occlusion_get_sample() 73 OUT_RING(ring, 1); /* NumInstances */ in occlusion_get_sample() 74 OUT_RING(ring, 0); /* NumIndices */ in occlusion_get_sample() 76 fd_event_write(batch, ring, ZPASS_DONE); in occlusion_get_sample() [all …]
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/external/mesa3d/src/gallium/auxiliary/util/ |
D | u_ringbuffer.c | 26 struct util_ringbuffer *ring = CALLOC_STRUCT(util_ringbuffer); in util_ringbuffer_create() local 27 if (!ring) in util_ringbuffer_create() 32 ring->buf = MALLOC( dwords * sizeof(unsigned) ); in util_ringbuffer_create() 33 if (ring->buf == NULL) in util_ringbuffer_create() 36 ring->mask = dwords - 1; in util_ringbuffer_create() 38 cnd_init(&ring->change); in util_ringbuffer_create() 39 (void) mtx_init(&ring->mutex, mtx_plain); in util_ringbuffer_create() 40 return ring; in util_ringbuffer_create() 43 FREE(ring->buf); in util_ringbuffer_create() 44 FREE(ring); in util_ringbuffer_create() [all …]
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/external/skqp/src/compute/skc/ |
D | extent_ring.c | 23 skc_extent_ring_init(struct skc_extent_ring * const ring, in skc_extent_ring_init() argument 28 ring->head = NULL; in skc_extent_ring_init() 29 ring->last = NULL; in skc_extent_ring_init() 31 ring->outer.rw = (skc_uint2){ 0 }; in skc_extent_ring_init() 32 ring->inner.rw = (skc_uint2){ 0 }; in skc_extent_ring_init() 36 ring->size.pow2 = size_pow2; in skc_extent_ring_init() 37 ring->size.mask = size_pow2 - 1; in skc_extent_ring_init() 38 ring->size.snap = size_snap; in skc_extent_ring_init() 39 ring->size.elem = size_elem; in skc_extent_ring_init() 47 skc_extent_ring_rem(struct skc_extent_ring const * const ring) in skc_extent_ring_rem() argument [all …]
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/external/skia/src/compute/skc/ |
D | extent_ring.c | 23 skc_extent_ring_init(struct skc_extent_ring * const ring, in skc_extent_ring_init() argument 28 ring->head = NULL; in skc_extent_ring_init() 29 ring->last = NULL; in skc_extent_ring_init() 31 ring->outer.rw = (skc_uint2){ 0 }; in skc_extent_ring_init() 32 ring->inner.rw = (skc_uint2){ 0 }; in skc_extent_ring_init() 36 ring->size.pow2 = size_pow2; in skc_extent_ring_init() 37 ring->size.mask = size_pow2 - 1; in skc_extent_ring_init() 38 ring->size.snap = size_snap; in skc_extent_ring_init() 39 ring->size.elem = size_elem; in skc_extent_ring_init() 47 skc_extent_ring_rem(struct skc_extent_ring const * const ring) in skc_extent_ring_rem() argument [all …]
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/external/linux-kselftest/tools/testing/selftests/net/ |
D | psock_tpacket.c | 83 struct ring { struct 88 void (*walk)(int sock, struct ring *ring); argument 237 static void walk_v1_v2_rx(int sock, struct ring *ring) in walk_v1_v2_rx() argument 244 bug_on(ring->type != PACKET_RX_RING); in walk_v1_v2_rx() 256 while (__v1_v2_rx_kernel_ready(ring->rd[frame_num].iov_base, in walk_v1_v2_rx() 257 ring->version)) { in walk_v1_v2_rx() 258 ppd.raw = ring->rd[frame_num].iov_base; in walk_v1_v2_rx() 260 switch (ring->version) { in walk_v1_v2_rx() 277 __v1_v2_rx_user_ready(ppd.raw, ring->version); in walk_v1_v2_rx() 279 frame_num = (frame_num + 1) % ring->rd_num; in walk_v1_v2_rx() [all …]
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/external/mesa3d/src/gallium/drivers/freedreno/ |
D | freedreno_util.h | 185 static inline void emit_marker(struct fd_ringbuffer *ring, int scratch_idx); 186 static inline void emit_marker5(struct fd_ringbuffer *ring, int scratch_idx); 189 OUT_RING(struct fd_ringbuffer *ring, uint32_t data) in OUT_RING() argument 192 DBG("ring[%p]: OUT_RING %04x: %08x", ring, in OUT_RING() 193 (uint32_t)(ring->cur - ring->last_start), data); in OUT_RING() 195 fd_ringbuffer_emit(ring, data); in OUT_RING() 200 OUT_RINGP(struct fd_ringbuffer *ring, uint32_t data, in OUT_RINGP() argument 204 DBG("ring[%p]: OUT_RINGP %04x: %08x", ring, in OUT_RINGP() 205 (uint32_t)(ring->cur - ring->last_start), data); in OUT_RINGP() 208 .cs = ring->cur++, in OUT_RINGP() [all …]
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/external/android-clat/ |
D | ring.c | 50 struct packet_ring *ring = &tunnel->ring; in ring_create() local 51 ring->numblocks = TP_NUM_BLOCKS; in ring_create() 53 int total_frames = TP_FRAMES * ring->numblocks; in ring_create() 58 .tp_block_nr = ring->numblocks, // Number of blocks. in ring_create() 67 size_t buflen = TP_BLOCK_SIZE * ring->numblocks; in ring_create() 68 ring->base = mmap(NULL, buflen, PROT_READ | PROT_WRITE, MAP_SHARED | MAP_LOCKED | MAP_POPULATE, in ring_create() 70 if (ring->base == MAP_FAILED) { in ring_create() 75 ring->block = 0; in ring_create() 76 ring->slot = 0; in ring_create() 77 ring->numslots = TP_BLOCK_SIZE / TP_FRAME_SIZE; in ring_create() [all …]
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