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Searched refs:rl_max_phase (Results 1 – 3 of 3) sorted by relevance

/external/u-boot/drivers/ddr/marvell/axp/
Dddr3_hw_training.c491 DEBUG_MAIN_FULL_C("Max RL Phase: ", dram_info->rl_max_phase, 2); in ddr3_set_performance_params()
499 trd2rd = 0x1 + (dram_info->rl_max_phase + 1) / 2 + in ddr3_set_performance_params()
500 (dram_info->rl_max_phase + 1) % 2; in ddr3_set_performance_params()
502 tmp1 = (dram_info->rl_max_phase - dram_info->wl_min_phase) / 2 + in ddr3_set_performance_params()
503 (((dram_info->rl_max_phase - dram_info->wl_min_phase) % 2) > in ddr3_set_performance_params()
Dddr3_read_leveling.c93 dram_info->rl_max_phase = 0; in ddr3_read_leveling_hw()
112 if (phase > dram_info->rl_max_phase) in ddr3_read_leveling_hw()
113 dram_info->rl_max_phase = phase; in ddr3_read_leveling_hw()
Dddr3_hw_training.h261 u32 rl_max_phase; member