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Searched refs:rldcl (Results 1 – 18 of 18) sorted by relevance

/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/PowerPC/
Dshift-cmp.ll25 ; CHECK: rldcl 3, 3, 4, 63
51 ; CHECK: rldcl 3, [[REG]], 4, 63
Dfunnel-shift-rot.ll67 ; CHECK-NEXT: rldcl 3, 3, 4, 0
/external/capstone/suite/MC/PowerPC/
Dppc64-encoding.s.cs175 0x78,0x62,0x21,0x50 = rldcl 2, 3, 4, 5
176 0x78,0x62,0x21,0x51 = rldcl. 2, 3, 4, 5
Dppc64-encoding-ext.s.cs485 0x78,0x62,0x20,0x10 = rldcl 2, 3, 4, 0
486 0x78,0x62,0x20,0x11 = rldcl. 2, 3, 4, 0
/external/swiftshader/third_party/LLVM/test/CodeGen/PowerPC/
Drotl-64.ll2 ; RUN: llc < %s -march=ppc64 | grep rldcl
/external/llvm/test/MC/PowerPC/
Dppc64-encoding.s740 # CHECK-BE: rldcl 2, 3, 4, 5 # encoding: [0x78,0x62,0x21,0x50]
741 # CHECK-LE: rldcl 2, 3, 4, 5 # encoding: [0x50,0x21,0x62,0x78]
742 rldcl 2, 3, 4, 5
743 # CHECK-BE: rldcl. 2, 3, 4, 5 # encoding: [0x78,0x62,0x21,0x51]
744 # CHECK-LE: rldcl. 2, 3, 4, 5 # encoding: [0x51,0x21,0x62,0x78]
745 rldcl. 2, 3, 4, 5
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/PowerPC/
Dppc64-encoding.s828 # CHECK-BE: rldcl 2, 3, 4, 5 # encoding: [0x78,0x62,0x21,0x50]
829 # CHECK-LE: rldcl 2, 3, 4, 5 # encoding: [0x50,0x21,0x62,0x78]
830 rldcl 2, 3, 4, 5
831 # CHECK-BE: rldcl. 2, 3, 4, 5 # encoding: [0x78,0x62,0x21,0x51]
832 # CHECK-LE: rldcl. 2, 3, 4, 5 # encoding: [0x51,0x21,0x62,0x78]
833 rldcl. 2, 3, 4, 5
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/PowerPC/
Dppc64le-encoding.txt589 # CHECK: rldcl 2, 3, 4, 5
592 # CHECK: rldcl. 2, 3, 4, 5
Dppc64-encoding.txt634 # CHECK: rldcl 2, 3, 4, 5
637 # CHECK: rldcl. 2, 3, 4, 5
/external/llvm/test/MC/Disassembler/PowerPC/
Dppc64-encoding.txt598 # CHECK: rldcl 2, 3, 4, 5
601 # CHECK: rldcl. 2, 3, 4, 5
Dppc64le-encoding.txt577 # CHECK: rldcl 2, 3, 4, 5
580 # CHECK: rldcl. 2, 3, 4, 5
/external/swiftshader/third_party/LLVM/lib/Target/PowerPC/
DPPCSchedule.td289 // rldcl IntRotateD
DPPCInstr64Bit.td462 "rldcl $rA, $rS, $rB, $MB", IntRotateD,
/external/v8/src/ppc/
Dassembler-ppc.cc1152 void Assembler::rldcl(Register ra, Register rs, Register rb, int mb, RCBit r) { in rldcl() function in v8::internal::Assembler
1203 rldcl(ra, rs, rb, 0, r); in rotld()
Dassembler-ppc.h1092 void rldcl(Register ra, Register rs, Register rb, int mb, RCBit r = LeaveRC);
Dconstants-ppc.h1830 V(rldcl, RLDCL, 0x78000010) \
/external/llvm/lib/Target/PowerPC/
DPPCInstr64Bit.td709 "rldcl", "$rA, $rS, $rB, $MBE", IIC_IntRotateD,
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/PowerPC/
DPPCInstr64Bit.td824 "rldcl", "$rA, $rS, $rB, $MBE", IIC_IntRotateD,