| /external/llvm/test/MC/PowerPC/ |
| D | ppc64-encoding.s | 710 # CHECK-BE: rlwnm 2, 3, 4, 5, 6 # encoding: [0x5c,0x62,0x21,0x4c]
711 # CHECK-LE: rlwnm 2, 3, 4, 5, 6 # encoding: [0x4c,0x21,0x62,0x5c]
712 rlwnm 2, 3, 4, 5, 6
713 # CHECK-BE: rlwnm. 2, 3, 4, 5, 6 # encoding: [0x5c,0x62,0x21,0x4d]
714 # CHECK-LE: rlwnm. 2, 3, 4, 5, 6 # encoding: [0x4d,0x21,0x62,0x5c]
715 rlwnm. 2, 3, 4, 5, 6
777 # CHECK-BE: rlwnm 0, 0, 30, 31, 31 # encoding: [0x5c,0x00,0xf7,0xfe]
778 rlwnm 0, 0, 30, 1
779 # CHECK-BE: rlwnm. 0, 0, 30, 31, 31 # encoding: [0x5c,0x00,0xf7,0xff]
780 rlwnm. 0, 0, 30, 1
[all …]
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/PowerPC/ |
| D | shift-cmp.ll | 13 ; CHECK: rlwnm 3, 3, 4, 31, 31
38 ; CHECK: rlwnm 3, [[REG]], 4, 31, 31
|
| D | rlwinm-zero-ext.ll | 41 ; CHECK-NOT: rlwnm {{{[0-9]+}}}, {{[0-9]+}}, {{{[0-9]+}}}, 28, 31
42 ; CHECK: rlwnm. [[REG:[0-9]+]], {{[0-9]+}}, 4, 28, 31
|
| D | rlwinm2.ll | 7 ; RUN: grep rlwnm %t | count 1
|
| D | funnel-shift-rot.ll | 58 ; CHECK-NEXT: rlwnm 3, 3, 4, 0, 31
151 ; CHECK-NEXT: rlwnm 3, 3, 4, 0, 31
|
| /external/llvm/test/CodeGen/PowerPC/ |
| D | rlwinm-zero-ext.ll | 41 ; CHECK-NOT: rlwnm {{{[0-9]+}}}, {{[0-9]+}}, {{{[0-9]+}}}, 28, 31
42 ; CHECK: rlwnm. [[REG:[0-9]+]], {{[0-9]+}}, 4, 28, 31
|
| D | rlwinm2.ll | 7 ; RUN: grep rlwnm %t | count 1
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/PowerPC/ |
| D | ppc64-encoding.s | 798 # CHECK-BE: rlwnm 2, 3, 4, 5, 6 # encoding: [0x5c,0x62,0x21,0x4c]
799 # CHECK-LE: rlwnm 2, 3, 4, 5, 6 # encoding: [0x4c,0x21,0x62,0x5c]
800 rlwnm 2, 3, 4, 5, 6
801 # CHECK-BE: rlwnm. 2, 3, 4, 5, 6 # encoding: [0x5c,0x62,0x21,0x4d]
802 # CHECK-LE: rlwnm. 2, 3, 4, 5, 6 # encoding: [0x4d,0x21,0x62,0x5c]
803 rlwnm. 2, 3, 4, 5, 6
865 # CHECK-BE: rlwnm 0, 0, 30, 31, 31 # encoding: [0x5c,0x00,0xf7,0xfe]
866 rlwnm 0, 0, 30, 1
867 # CHECK-BE: rlwnm. 0, 0, 30, 31, 31 # encoding: [0x5c,0x00,0xf7,0xff]
868 rlwnm. 0, 0, 30, 1
[all …]
|
| /external/capstone/suite/MC/PowerPC/ |
| D | ppc64-encoding.s.cs | 165 0x5c,0x62,0x21,0x4c = rlwnm 2, 3, 4, 5, 6
166 0x5c,0x62,0x21,0x4d = rlwnm. 2, 3, 4, 5, 6
|
| D | ppc64-encoding-ext.s.cs | 509 0x5c,0x62,0x20,0x3e = rlwnm 2, 3, 4, 0, 31
510 0x5c,0x62,0x20,0x3f = rlwnm. 2, 3, 4, 0, 31
|
| /external/u-boot/post/lib_powerpc/ |
| D | Makefile | 8 obj-y += threei.o andi.o srawi.o rlwnm.o rlwinm.o rlwimi.o
|
| /external/swiftshader/third_party/LLVM/test/CodeGen/PowerPC/ |
| D | rlwinm2.ll | 7 ; RUN: grep rlwnm %t | count 1
|
| D | rotl.ll | 1 ; RUN: llc < %s -march=ppc32 | grep rlwnm | count 2
|
| D | rotl-2.ll | 2 ; RUN: llc < %s -march=ppc32 | grep rlwnm | count 2
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/PowerPC/ |
| D | ppc64le-encoding.txt | 559 # CHECK: rlwnm 2, 3, 4, 5, 6
562 # CHECK: rlwnm. 2, 3, 4, 5, 6
|
| D | ppc64-encoding.txt | 604 # CHECK: rlwnm 2, 3, 4, 5, 6
607 # CHECK: rlwnm. 2, 3, 4, 5, 6
|
| /external/llvm/test/MC/Disassembler/PowerPC/ |
| D | ppc64-encoding.txt | 568 # CHECK: rlwnm 2, 3, 4, 5, 6
571 # CHECK: rlwnm. 2, 3, 4, 5, 6
|
| D | ppc64le-encoding.txt | 547 # CHECK: rlwnm 2, 3, 4, 5, 6
550 # CHECK: rlwnm. 2, 3, 4, 5, 6
|
| /external/swiftshader/third_party/LLVM/lib/Target/PowerPC/ |
| D | PPCSchedule.td | 297 // rlwnm IntGeneral
|
| /external/v8/src/ppc/ |
| D | assembler-ppc.cc | 777 void Assembler::rlwnm(Register ra, Register rs, Register rb, int mb, int me, in rlwnm() function in v8::internal::Assembler
823 rlwnm(ra, rs, rb, 0, 31, r); in rotlw()
|
| D | assembler-ppc.h | 1117 void rlwnm(Register ra, Register rs, Register rb, int mb, int me,
|
| D | constants-ppc.h | 2154 V(rlwnm, RLWNMX, 0x5C000000)
|
| /external/u-boot/doc/ |
| D | README.POST | 475 This group will contain: slw, srw, sraw, srawi, rlwinm, rlwnm,
|
| /external/llvm/lib/Target/PowerPC/ |
| D | PPCInstr64Bit.td | 744 "rlwnm", "$rA, $rS, $rB, $MB, $ME", IIC_IntGeneral,
|
| D | PPCInstrInfo.td | 2657 "rlwnm", "$rA, $rS, $rB, $MB, $ME", IIC_IntGeneral,
4033 def RLWNMbm : PPCAsmPseudo<"rlwnm $rA, $rS, $n, $b",
4035 def RLWNMobm : PPCAsmPseudo<"rlwnm. $rA, $rS, $n, $b",
|