| /external/eigen/test/ |
| D | basicstuff.cpp | 165 RealMatrixType rm1 = RealMatrixType::Random(rows,cols), in basicStuffComplex() local
168 cm.real() = rm1; in basicStuffComplex()
170 VERIFY_IS_APPROX(static_cast<const MatrixType&>(cm).real(), rm1); in basicStuffComplex()
172 rm1.setZero(); in basicStuffComplex()
174 rm1 = cm.real(); in basicStuffComplex()
176 VERIFY_IS_APPROX(static_cast<const MatrixType&>(cm).real(), rm1); in basicStuffComplex()
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| D | ref.cpp | 58 RefDynMat rm1 = m1; in ref_matrix() local
59 VERIFY_IS_EQUAL(rm1, m1); in ref_matrix()
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| /external/libprotobuf-mutator/src/ |
| D | mutator_test.cc | 529 auto* rm1 = m1.add_repeated_msg(); in TYPED_TEST() local
530 rm1->add_repeated_int32(1); in TYPED_TEST()
531 rm1->add_repeated_int32(2); in TYPED_TEST()
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| /external/vixl/src/aarch32/ |
| D | assembler-aarch32.h | 559 Condition cond, Register rt, Register rt2, SRegister rm, SRegister rm1);
561 Condition cond, SRegister rm, SRegister rm1, Register rt, Register rt2);
4926 Condition cond, Register rt, Register rt2, SRegister rm, SRegister rm1);
4927 void vmov(Register rt, Register rt2, SRegister rm, SRegister rm1) { in vmov() argument
4928 vmov(al, rt, rt2, rm, rm1); in vmov()
4932 Condition cond, SRegister rm, SRegister rm1, Register rt, Register rt2);
4933 void vmov(SRegister rm, SRegister rm1, Register rt, Register rt2) { in vmov() argument
4934 vmov(al, rm, rm1, rt, rt2); in vmov()
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| D | macro-assembler-aarch32.h | 7769 Condition cond, Register rt, Register rt2, SRegister rm, SRegister rm1) { in Vmov() argument
7773 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm1)); in Vmov()
7778 vmov(cond, rt, rt2, rm, rm1); in Vmov()
7780 void Vmov(Register rt, Register rt2, SRegister rm, SRegister rm1) { in Vmov() argument
7781 Vmov(al, rt, rt2, rm, rm1); in Vmov()
7785 Condition cond, SRegister rm, SRegister rm1, Register rt, Register rt2) { in Vmov() argument
7787 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm1)); in Vmov()
7794 vmov(cond, rm, rm1, rt, rt2); in Vmov()
7796 void Vmov(SRegister rm, SRegister rm1, Register rt, Register rt2) { in Vmov() argument
7797 Vmov(al, rm, rm1, rt, rt2); in Vmov()
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| D | disasm-aarch32.h | 2014 Condition cond, Register rt, Register rt2, SRegister rm, SRegister rm1);
2017 Condition cond, SRegister rm, SRegister rm1, Register rt, Register rt2);
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| D | assembler-aarch32.cc | 20842 Condition cond, Register rt, Register rt2, SRegister rm, SRegister rm1) { in vmov() argument
20847 if ((((rm.GetCode() + 1) % kNumberOfSRegisters) == rm1.GetCode()) && in vmov()
20856 if ((((rm.GetCode() + 1) % kNumberOfSRegisters) == rm1.GetCode()) && in vmov()
20864 Delegate(kVmov, &Assembler::vmov, cond, rt, rt2, rm, rm1); in vmov()
20868 Condition cond, SRegister rm, SRegister rm1, Register rt, Register rt2) { in vmov() argument
20873 if ((((rm.GetCode() + 1) % kNumberOfSRegisters) == rm1.GetCode()) && in vmov()
20882 if ((((rm.GetCode() + 1) % kNumberOfSRegisters) == rm1.GetCode()) && in vmov()
20890 Delegate(kVmov, &Assembler::vmov, cond, rm, rm1, rt, rt2); in vmov()
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| D | disasm-aarch32.cc | 5273 Condition cond, Register rt, Register rt2, SRegister rm, SRegister rm1) { in vmov() argument
5276 << ", " << rt2 << ", " << rm << ", " << rm1; in vmov()
5280 Condition cond, SRegister rm, SRegister rm1, Register rt, Register rt2) { in vmov() argument
5283 << ", " << rm1 << ", " << rt << ", " << rt2; in vmov()
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| /external/hyphenation-patterns/hu/ |
| D | hyph-hu.pat.txt | 47261 rm1á2ram
47334 rm1üg
47335 rm1üz
|