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Searched refs:rmw (Results 1 – 25 of 31) sorted by relevance

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/external/swiftshader/third_party/subzero/tests_lit/llvm2ice_tests/
Drmw.ll12 %rmw = add i32 %val, %var
13 store i32 %rmw, i32* %addr, align 1
24 %rmw = add i32 %val, 19
25 store i32 %rmw, i32* %addr, align 1
36 %rmw = add i32 %val, %var
37 store i32 %rmw, i32* %addr, align 1
38 ret i32 %rmw
48 %rmw = add i16 %val, %var
49 store i16 %rmw, i16* %addr, align 1
60 %rmw = add i16 %val, 19
[all …]
Dnacl-atomic-errors.ll13 declare i8 @llvm.nacl.atomic.rmw.i8(i32, i8*, i8, i32)
14 declare i16 @llvm.nacl.atomic.rmw.i16(i32, i16*, i16, i32)
15 declare i32 @llvm.nacl.atomic.rmw.i32(i32, i32*, i32, i32)
16 declare i64 @llvm.nacl.atomic.rmw.i64(i32, i64*, i64, i32)
88 %a = call i8 @llvm.nacl.atomic.rmw.i8(i32 1, i8* %ptr, i8 %trunc, i32 1)
97 %a = call i64 @llvm.nacl.atomic.rmw.i64(i32 1, i64* %ptr, i64 %v, i32 7)
106 %a = call i16 @llvm.nacl.atomic.rmw.i16(i32 0, i16* %ptr, i16 %trunc, i32 6)
115 %a = call i32 @llvm.nacl.atomic.rmw.i32(i32 7, i32* %ptr, i32 %v, i32 6)
123 %a = call i32 @llvm.nacl.atomic.rmw.i32(i32 4294967295, i32* %ptr, i32 %v, i32 6)
202 %a = call i8 @llvm.nacl.atomic.rmw.i8(i32 1, i8* %ptr, i8 %trunc, i32 %iptr)
Dnacl-atomic-intrinsics.ll49 declare i8 @llvm.nacl.atomic.rmw.i8(i32, i8*, i8, i32)
50 declare i16 @llvm.nacl.atomic.rmw.i16(i32, i16*, i16, i32)
51 declare i32 @llvm.nacl.atomic.rmw.i32(i32, i32*, i32, i32)
52 declare i64 @llvm.nacl.atomic.rmw.i64(i32, i64*, i64, i32)
339 %a = call i8 @llvm.nacl.atomic.rmw.i8(i32 1, i8* %ptr, i8 %trunc, i32 6)
380 %a = call i16 @llvm.nacl.atomic.rmw.i16(i32 1, i16* %ptr, i16 %trunc, i32 6)
420 %a = call i32 @llvm.nacl.atomic.rmw.i32(i32 1, i32* %ptr, i32 %v, i32 6)
444 %a = call i64 @llvm.nacl.atomic.rmw.i64(i32 1, i64* %ptr, i64 %v, i32 6)
479 %a = call i64 @llvm.nacl.atomic.rmw.i64(i32 1, i64* %ptr, i64 %v, i32 6)
506 %old = call i64 @llvm.nacl.atomic.rmw.i64(i32 1, i64* %ptr, i64 %v, i32 6)
[all …]
Dabi-atomics.ll17 declare i8 @llvm.nacl.atomic.rmw.i8(i32, i8*, i8, i32)
18 declare i16 @llvm.nacl.atomic.rmw.i16(i32, i16*, i16, i32)
19 declare i32 @llvm.nacl.atomic.rmw.i32(i32, i32*, i32, i32)
20 declare i64 @llvm.nacl.atomic.rmw.i64(i32, i64*, i64, i32)
148 ; rmw
152 %1 = call i32 @llvm.nacl.atomic.rmw.i32(i32 1, i32* %ptr, i32 0, i32 7)
159 %1 = call i32 @llvm.nacl.atomic.rmw.i32(i32 1, i32* %ptr, i32 0, i32 0)
166 %1 = call i32 @llvm.nacl.atomic.rmw.i32(i32 1, i32* %ptr, i32 0, i32 6)
173 %1 = call i32 @llvm.nacl.atomic.rmw.i32(i32 1, i32* %ptr, i32 0, i32 5)
180 %1 = call i32 @llvm.nacl.atomic.rmw.i32(i32 1, i32* %ptr, i32 0, i32 4)
[all …]
/external/swiftshader/third_party/subzero/tests_lit/reader_tests/
Dnacl-atomic-intrinsics.ll15 declare i8 @llvm.nacl.atomic.rmw.i8(i32, i8*, i8, i32)
16 declare i16 @llvm.nacl.atomic.rmw.i16(i32, i16*, i16, i32)
17 declare i32 @llvm.nacl.atomic.rmw.i32(i32, i32*, i32, i32)
18 declare i64 @llvm.nacl.atomic.rmw.i64(i32, i64*, i64, i32)
166 %a = call i8 @llvm.nacl.atomic.rmw.i8(i32 1, i8* %ptr, i8 %trunc, i32 6)
174 ; CHECK-NEXT: %a = call i8 @llvm.nacl.atomic.rmw.i8(i32 1, i32 %iptr, i8 %trunc, i32 6)
183 %a = call i16 @llvm.nacl.atomic.rmw.i16(i32 1, i16* %ptr, i16 %trunc, i32 6)
191 ; CHECK-NEXT: %a = call i16 @llvm.nacl.atomic.rmw.i16(i32 1, i32 %iptr, i16 %trunc, i32 6)
199 %a = call i32 @llvm.nacl.atomic.rmw.i32(i32 1, i32* %ptr, i32 %v, i32 6)
205 ; CHECK-NEXT: %a = call i32 @llvm.nacl.atomic.rmw.i32(i32 1, i32 %iptr, i32 %v, i32 6)
[all …]
/external/swiftshader/third_party/subzero/tests_lit/assembler/arm32/
Dldrex-strex.ll21 declare i8 @llvm.nacl.atomic.rmw.i8(i32, i8*, i8, i32)
23 declare i16 @llvm.nacl.atomic.rmw.i16(i32, i16*, i16, i32)
25 declare i32 @llvm.nacl.atomic.rmw.i32(i32, i32*, i32, i32) #0
27 declare i64 @llvm.nacl.atomic.rmw.i64(i32, i64*, i64, i32) #0
38 %v = call i8 @llvm.nacl.atomic.rmw.i8(i32 1, i8* %ptr.asptr,
78 %v = call i16 @llvm.nacl.atomic.rmw.i16(i32 1, i16* %ptr.asptr,
107 %v = call i32 @llvm.nacl.atomic.rmw.i32(i32 1, i32* %ptr.asptr,
136 %v = call i64 @llvm.nacl.atomic.rmw.i64(i32 1, i64* %ptr.asptr,
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/WebAssembly/
Datomic-rmw.ll15 ; CHECK: i32.atomic.rmw.add $push0=, 0($0), $1{{$}}
24 ; CHECK: i32.atomic.rmw.sub $push0=, 0($0), $1{{$}}
33 ; CHECK: i32.atomic.rmw.and $push0=, 0($0), $1{{$}}
42 ; CHECK: i32.atomic.rmw.or $push0=, 0($0), $1{{$}}
51 ; CHECK: i32.atomic.rmw.xor $push0=, 0($0), $1{{$}}
60 ; CHECK: i32.atomic.rmw.xchg $push0=, 0($0), $1{{$}}
73 ; CHECK: i64.atomic.rmw.add $push0=, 0($0), $1{{$}}
82 ; CHECK: i64.atomic.rmw.sub $push0=, 0($0), $1{{$}}
91 ; CHECK: i64.atomic.rmw.and $push0=, 0($0), $1{{$}}
100 ; CHECK: i64.atomic.rmw.or $push0=, 0($0), $1{{$}}
[all …]
Datomic-mem-consistency.ll100 ; CHECK: i32.atomic.rmw.add $push0=, 0($0), $1{{$}}
109 ; CHECK: i32.atomic.rmw.add $push0=, 0($0), $1{{$}}
118 ; CHECK: i32.atomic.rmw.add $push0=, 0($0), $1{{$}}
127 ; CHECK: i32.atomic.rmw.add $push0=, 0($0), $1{{$}}
136 ; CHECK: i32.atomic.rmw.add $push0=, 0($0), $1{{$}}
Doffset-atomics.ll667 ; CHECK: i32.atomic.rmw.add $push0=, 0($0), $1{{$}}
677 ; CHECK: i32.atomic.rmw.add $push0=, 24($0), $1{{$}}
689 ; CHECK: i32.atomic.rmw.add $push0=, 24($0), $1{{$}}
701 ; CHECK: i32.atomic.rmw.add $push2=, 0($pop1), $1{{$}}
713 ; CHECK: i32.atomic.rmw.add $push2=, 0($pop1), $1{{$}}
727 ; CHECK: i32.atomic.rmw.add $push2=, 0($pop1), $1{{$}}
738 ; CHECK: i32.atomic.rmw.add $push1=, 42($pop0), $0{{$}}
747 ; CHECK: i32.atomic.rmw.add $push1=, gv($pop0), $0{{$}}
761 ; CHECK: i64.atomic.rmw.add $push0=, 0($0), $1{{$}}
771 ; CHECK: i64.atomic.rmw.add $push0=, 24($0), $1{{$}}
[all …]
/external/u-boot/arch/arm/mach-keystone/
Dddr3.c241 u32 rmw = ddr3_ecc_support_rmw(base); in ddr3_ecc_init_range() local
243 if (rmw) in ddr3_ecc_init_range()
254 u32 rmw = ddr3_ecc_support_rmw(base); in ddr3_enable_ecc() local
259 if (!rmw) { in ddr3_enable_ecc()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/WebAssembly/
DWebAssemblyInstrAtomics.td346 defm ATOMIC_RMW_ADD_I32 : WebAssemblyBinRMW<I32, "i32.atomic.rmw.add", 0xfe1e>;
347 defm ATOMIC_RMW_ADD_I64 : WebAssemblyBinRMW<I64, "i64.atomic.rmw.add", 0xfe1f>;
359 defm ATOMIC_RMW_SUB_I32 : WebAssemblyBinRMW<I32, "i32.atomic.rmw.sub", 0xfe25>;
360 defm ATOMIC_RMW_SUB_I64 : WebAssemblyBinRMW<I64, "i64.atomic.rmw.sub", 0xfe26>;
372 defm ATOMIC_RMW_AND_I32 : WebAssemblyBinRMW<I32, "i32.atomic.rmw.and", 0xfe2c>;
373 defm ATOMIC_RMW_AND_I64 : WebAssemblyBinRMW<I64, "i64.atomic.rmw.and", 0xfe2d>;
385 defm ATOMIC_RMW_OR_I32 : WebAssemblyBinRMW<I32, "i32.atomic.rmw.or", 0xfe33>;
386 defm ATOMIC_RMW_OR_I64 : WebAssemblyBinRMW<I64, "i64.atomic.rmw.or", 0xfe34>;
398 defm ATOMIC_RMW_XOR_I32 : WebAssemblyBinRMW<I32, "i32.atomic.rmw.xor", 0xfe3a>;
399 defm ATOMIC_RMW_XOR_I64 : WebAssemblyBinRMW<I64, "i64.atomic.rmw.xor", 0xfe3b>;
[all …]
/external/webrtc/webrtc/modules/audio_processing/beamformer/
Dnonlinear_beamformer.cc435 complex_f rmw = abs(ConjugateDotProduct(delay_sum_masks_[i], eig_m_)); in ProcessAudioBlock() local
436 rmw *= rmw; in ProcessAudioBlock()
437 float rmw_r = rmw.real(); in ProcessAudioBlock()
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/AVR/
Dinst-las.s1 ; RUN: llvm-mc -triple avr -mattr=rmw -show-encoding < %s | FileCheck %s
Dinst-xch.s1 ; RUN: llvm-mc -triple avr -mattr=rmw -show-encoding < %s | FileCheck %s
Dinst-lac.s1 ; RUN: llvm-mc -triple avr -mattr=rmw -show-encoding < %s | FileCheck %s
Dinst-lat.s1 ; RUN: llvm-mc -triple avr -mattr=rmw -show-encoding < %s | FileCheck %s
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/X86/
Datomic_idempotent.ll4 ; On x86, an atomic rmw operation that does not modify the value in memory
/external/llvm/test/CodeGen/X86/
Datomic_idempotent.ll4 ; On x86, an atomic rmw operation that does not modify the value in memory
/external/swiftshader/third_party/subzero/tests_lit/assembler/x86/
Djump_encodings.ll11 declare i32 @llvm.nacl.atomic.rmw.i32(i32, i32*, i32, i32)
191 %a = call i32 @llvm.nacl.atomic.rmw.i32(i32 5, i32* %ptr, i32 %val, i32 6)
/external/cldr/tools/java/org/unicode/cldr/util/data/
Diso-639-3-macrolanguages.tab338 rom rmw A
/external/swiftshader/third_party/subzero/src/
DIceClFlags.def374 clEnumValN(Ice::IceV_RMW, "rmw", "ReadModifyWrite optimization"), \
/external/llvm/lib/Target/AVR/
DAVR.td122 def FeatureRMW : SubtargetFeature<"rmw", "m_supportsRMW", "true",
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AVR/
DAVRDevices.td104 def FeatureRMW : SubtargetFeature<"rmw", "m_supportsRMW", "true",
/external/swiftshader/third_party/llvm-7.0/llvm/docs/
DAtomics.rst461 * atomic rmw -> loop with cmpxchg or load-linked/store-conditional
/external/llvm/docs/
DAtomics.rst461 * atomic rmw -> loop with cmpxchg or load-linked/store-conditional

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