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Searched refs:rotl (Results 1 – 25 of 84) sorted by relevance

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/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/SystemZ/
Drot-02.ll17 %rotl = or i32 %parta, %partb
19 ret i32 %rotl
33 %rotl = or i32 %parta, %partb
35 ret i32 %rotl
49 %rotl = or i32 %parta, %partb
51 ret i32 %rotl
65 %rotl = or i64 %parta, %partb
67 ret i64 %rotl
82 %rotl = or i32 %parta, %partb
84 %reuse = add i32 %and, %rotl
Drot-01.ll16 %rotl = or i32 %parta, %partb
18 ret i32 %rotl
32 %rotl = or i64 %parta, %partb
34 ret i64 %rotl
Drisbg-04.ll143 %rotl = or i32 %parta, %partb
144 %and = and i32 %rotl, 248
155 %rotl = or i64 %parta, %partb
156 %and = and i64 %rotl, 248
167 %rotl = or i32 %parta, %partb
168 %and = and i32 %rotl, 114688
179 %rotl = or i64 %parta, %partb
180 %and = and i64 %rotl, 114688
193 %rotl = or i32 %parta, %partb
194 %and = and i32 %rotl, 126
[all …]
Drisbg-01.ll143 %rotl = or i32 %parta, %partb
144 %and = and i32 %rotl, 248
155 %rotl = or i64 %parta, %partb
156 %and = and i64 %rotl, 248
167 %rotl = or i32 %parta, %partb
168 %and = and i32 %rotl, 114688
179 %rotl = or i64 %parta, %partb
180 %and = and i64 %rotl, 114688
193 %rotl = or i32 %parta, %partb
194 %and = and i32 %rotl, 126
[all …]
/external/llvm/test/CodeGen/SystemZ/
Drot-02.ll17 %rotl = or i32 %parta, %partb
19 ret i32 %rotl
33 %rotl = or i32 %parta, %partb
35 ret i32 %rotl
49 %rotl = or i32 %parta, %partb
51 ret i32 %rotl
65 %rotl = or i64 %parta, %partb
67 ret i64 %rotl
82 %rotl = or i32 %parta, %partb
84 %reuse = add i32 %and, %rotl
Drot-01.ll16 %rotl = or i32 %parta, %partb
18 ret i32 %rotl
32 %rotl = or i64 %parta, %partb
34 ret i64 %rotl
Drisbg-01.ll143 %rotl = or i32 %parta, %partb
144 %and = and i32 %rotl, 248
155 %rotl = or i64 %parta, %partb
156 %and = and i64 %rotl, 248
167 %rotl = or i32 %parta, %partb
168 %and = and i32 %rotl, 114688
179 %rotl = or i64 %parta, %partb
180 %and = and i64 %rotl, 114688
193 %rotl = or i32 %parta, %partb
194 %and = and i32 %rotl, 126
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/external/swiftshader/third_party/LLVM/test/TableGen/
DSetTheory.td96 // The 'rotl' operator rotates left, but also accepts a negative shift.
97 def rotl;
98 def S6a : Set<(rotl S0f, 0)>;
99 def S6b : Set<(rotl S0f, 1)>;
100 def S6c : Set<(rotl S0f, 3)>;
101 def S6d : Set<(rotl S0f, 4)>;
102 def S6e : Set<(rotl S0f, 5)>;
103 def S6f : Set<(rotl S0f, -1)>;
104 def S6g : Set<(rotl S0f, -4)>;
105 def S6h : Set<(rotl S0f, -5)>;
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/external/llvm/test/TableGen/
DSetTheory.td96 // The 'rotl' operator rotates left, but also accepts a negative shift.
97 def rotl;
98 def S6a : Set<(rotl S0f, 0)>;
99 def S6b : Set<(rotl S0f, 1)>;
100 def S6c : Set<(rotl S0f, 3)>;
101 def S6d : Set<(rotl S0f, 4)>;
102 def S6e : Set<(rotl S0f, 5)>;
103 def S6f : Set<(rotl S0f, -1)>;
104 def S6g : Set<(rotl S0f, -4)>;
105 def S6h : Set<(rotl S0f, -5)>;
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/external/swiftshader/third_party/llvm-7.0/llvm/test/TableGen/
DSetTheory.td96 // The 'rotl' operator rotates left, but also accepts a negative shift.
97 def rotl;
98 def S6a : Set<(rotl S0f, 0)>;
99 def S6b : Set<(rotl S0f, 1)>;
100 def S6c : Set<(rotl S0f, 3)>;
101 def S6d : Set<(rotl S0f, 4)>;
102 def S6e : Set<(rotl S0f, 5)>;
103 def S6f : Set<(rotl S0f, -1)>;
104 def S6g : Set<(rotl S0f, -4)>;
105 def S6h : Set<(rotl S0f, -5)>;
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/external/llvm/lib/Target/AArch64/
DAArch64RegisterInfo.td131 let AltOrders = [(rotl GPR32common, 8)];
136 let AltOrders = [(rotl GPR64common, 8)];
141 let AltOrders = [(rotl GPR32, 8)];
145 let AltOrders = [(rotl GPR64, 8)];
151 let AltOrders = [(rotl GPR32sp, 8)];
155 let AltOrders = [(rotl GPR64sp, 8)];
414 def DSeqPairs : RegisterTuples<[dsub0, dsub1], [(rotl FPR64, 0), (rotl FPR64, 1)]>;
416 [(rotl FPR64, 0), (rotl FPR64, 1),
417 (rotl FPR64, 2)]>;
419 [(rotl FPR64, 0), (rotl FPR64, 1),
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/
DAArch64RegisterInfo.td140 let AltOrders = [(rotl GPR32common, 8)];
145 let AltOrders = [(rotl GPR64common, 8)];
150 let AltOrders = [(rotl GPR32, 8)];
154 let AltOrders = [(rotl GPR64, 8)];
160 let AltOrders = [(rotl GPR32sp, 8)];
164 let AltOrders = [(rotl GPR64sp, 8)];
433 def DSeqPairs : RegisterTuples<[dsub0, dsub1], [(rotl FPR64, 0), (rotl FPR64, 1)]>;
435 [(rotl FPR64, 0), (rotl FPR64, 1),
436 (rotl FPR64, 2)]>;
438 [(rotl FPR64, 0), (rotl FPR64, 1),
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/
DX86InstrShiftRotate.td460 [(set GR8:$dst, (rotl GR8:$src1, CL))]>;
463 [(set GR16:$dst, (rotl GR16:$src1, CL))]>, OpSize16;
466 [(set GR32:$dst, (rotl GR32:$src1, CL))]>, OpSize32;
469 [(set GR64:$dst, (rotl GR64:$src1, CL))]>;
474 [(set GR8:$dst, (rotl GR8:$src1, (i8 imm:$src2)))]>;
477 [(set GR16:$dst, (rotl GR16:$src1, (i8 imm:$src2)))]>, OpSize16;
480 [(set GR32:$dst, (rotl GR32:$src1, (i8 imm:$src2)))]>, OpSize32;
484 [(set GR64:$dst, (rotl GR64:$src1, (i8 imm:$src2)))]>;
489 [(set GR8:$dst, (rotl GR8:$src1, (i8 1)))]>;
492 [(set GR16:$dst, (rotl GR16:$src1, (i8 1)))]>, OpSize16;
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/external/llvm/lib/Target/WebAssembly/
DWebAssemblyInstrInteger.td39 defm ROTL : BinaryInt<rotl, "rotl">;
69 def : Pat<(rotl I32:$lhs, (and I32:$rhs, 31)), (ROTL_I32 I32:$lhs, I32:$rhs)>;
71 def : Pat<(rotl I64:$lhs, (and I64:$rhs, 63)), (ROTL_I64 I64:$lhs, I64:$rhs)>;
/external/swiftshader/third_party/llvm-7.0/llvm/unittests/ADT/
DAPIntTest.cpp294 EXPECT_EQ(one, one.rotl(0)); in TEST()
295 EXPECT_EQ(one, one.rotl(1)); in TEST()
1376 EXPECT_EQ(APInt(8, 1), APInt(8, 1).rotl(0)); in TEST()
1377 EXPECT_EQ(APInt(8, 2), APInt(8, 1).rotl(1)); in TEST()
1378 EXPECT_EQ(APInt(8, 4), APInt(8, 1).rotl(2)); in TEST()
1379 EXPECT_EQ(APInt(8, 16), APInt(8, 1).rotl(4)); in TEST()
1380 EXPECT_EQ(APInt(8, 1), APInt(8, 1).rotl(8)); in TEST()
1382 EXPECT_EQ(APInt(8, 16), APInt(8, 16).rotl(0)); in TEST()
1383 EXPECT_EQ(APInt(8, 32), APInt(8, 16).rotl(1)); in TEST()
1384 EXPECT_EQ(APInt(8, 64), APInt(8, 16).rotl(2)); in TEST()
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/external/boringssl/src/crypto/fipsmodule/sha/asm/
Dsha1-586.pl173 &rotl($tmp1,5); # tmp1=ROTATE(a,5)
203 &rotl($f,1); # f=ROTATE(f,1)
209 &rotl($a,5); # ROTATE(a,5)
220 &rotl($f,1); # f=ROTATE(f,1)
226 &rotl($tmp1,5); # ROTATE(a,5)
247 &rotl($f,1); # f=ROTATE(f,1)
251 &rotl($a,5); # ROTATE(a,5)
265 &rotl($f,1); # f=ROTATE(f,1)
269 &rotl($tmp1,5); # ROTATE(a,5)
290 &rotl($f,1); # f=ROTATE(f,1)
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/external/swiftshader/third_party/LLVM/lib/Target/X86/
DX86InstrShiftRotate.td419 [(set GR8:$dst, (rotl GR8:$src1, CL))]>;
422 [(set GR16:$dst, (rotl GR16:$src1, CL))]>, OpSize;
425 [(set GR32:$dst, (rotl GR32:$src1, CL))]>;
428 [(set GR64:$dst, (rotl GR64:$src1, CL))]>;
433 [(set GR8:$dst, (rotl GR8:$src1, (i8 imm:$src2)))]>;
436 [(set GR16:$dst, (rotl GR16:$src1, (i8 imm:$src2)))]>,
440 [(set GR32:$dst, (rotl GR32:$src1, (i8 imm:$src2)))]>;
444 [(set GR64:$dst, (rotl GR64:$src1, (i8 imm:$src2)))]>;
449 [(set GR8:$dst, (rotl GR8:$src1, (i8 1)))]>;
452 [(set GR16:$dst, (rotl GR16:$src1, (i8 1)))]>, OpSize;
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/WebAssembly/
DWebAssemblyInstrInteger.td39 defm ROTL : BinaryInt<rotl, "rotl", 0x77, 0x89>;
69 def : Pat<(rotl I32:$lhs, (and I32:$rhs, 31)), (ROTL_I32 I32:$lhs, I32:$rhs)>;
71 def : Pat<(rotl I64:$lhs, (and I64:$rhs, 63)), (ROTL_I64 I64:$lhs, I64:$rhs)>;
/external/llvm/lib/Target/X86/
DX86InstrShiftRotate.td473 [(set GR8:$dst, (rotl GR8:$src1, CL))], IIC_SR>;
476 [(set GR16:$dst, (rotl GR16:$src1, CL))], IIC_SR>, OpSize16;
479 [(set GR32:$dst, (rotl GR32:$src1, CL))], IIC_SR>, OpSize32;
482 [(set GR64:$dst, (rotl GR64:$src1, CL))], IIC_SR>;
487 [(set GR8:$dst, (rotl GR8:$src1, (i8 imm:$src2)))], IIC_SR>;
490 [(set GR16:$dst, (rotl GR16:$src1, (i8 imm:$src2)))],
494 [(set GR32:$dst, (rotl GR32:$src1, (i8 imm:$src2)))],
499 [(set GR64:$dst, (rotl GR64:$src1, (i8 imm:$src2)))],
505 [(set GR8:$dst, (rotl GR8:$src1, (i8 1)))],
509 [(set GR16:$dst, (rotl GR16:$src1, (i8 1)))],
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/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/AVR/
Drot.ll25 %rotl = or i8 %parta, %partb
27 ret i8 %rotl
/external/boringssl/src/crypto/fipsmodule/md5/asm/
Dmd5-586.pl69 &rotl($a,$s);
94 &rotl($a,$s);
117 &rotl($a,$s);
140 &rotl($a,$s);
166 &rotl($a,$s);
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/
DARMRegisterInfo.td302 (decimate (rotl SPR, 1), 4),
303 (decimate (rotl SPR, 1), 2))];
314 (decimate (rotl HPR, 1), 4),
315 (decimate (rotl HPR, 1), 2))];
336 let AltOrders = [(rotl DPR, 16),
337 (add (decimate (rotl DPR, 16), 2), (rotl DPR, 16))];
362 let AltOrders = [(rotl QPR, 8)];
393 let AltOrders = [(add (rotl QPR, 8), (rotl DPair, 16))];
428 let AltOrders = [(rotl QQPR, 8)];
451 let AltOrders = [(rotl QQQQPR, 8)];
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/RISCV/
Drotl-rotr.ll8 define i32 @rotl(i32 %x, i32 %y) {
9 ; RV32I-LABEL: rotl:
/external/llvm/lib/Target/ARM/
DARMRegisterInfo.td276 (decimate (rotl SPR, 1), 4),
277 (decimate (rotl SPR, 1), 2))];
295 let AltOrders = [(rotl DPR, 16),
296 (add (decimate (rotl DPR, 16), 2), (rotl DPR, 16))];
316 let AltOrders = [(rotl QPR, 8)];
342 let AltOrders = [(add (rotl QPR, 8), (rotl DPair, 16))];
377 let AltOrders = [(rotl QQPR, 8)];
400 let AltOrders = [(rotl QQQQPR, 8)];
/external/llvm/unittests/ADT/
DAPIntTest.cpp170 EXPECT_EQ(one, one.rotl(0)); in TEST()
171 EXPECT_EQ(one, one.rotl(1)); in TEST()
800 EXPECT_EQ(APInt(8, 1), APInt(8, 1).rotl(0)); in TEST()
801 EXPECT_EQ(APInt(8, 2), APInt(8, 1).rotl(1)); in TEST()
802 EXPECT_EQ(APInt(8, 4), APInt(8, 1).rotl(2)); in TEST()
803 EXPECT_EQ(APInt(8, 16), APInt(8, 1).rotl(4)); in TEST()
804 EXPECT_EQ(APInt(8, 1), APInt(8, 1).rotl(8)); in TEST()
806 EXPECT_EQ(APInt(8, 16), APInt(8, 16).rotl(0)); in TEST()
807 EXPECT_EQ(APInt(8, 32), APInt(8, 16).rotl(1)); in TEST()
808 EXPECT_EQ(APInt(8, 64), APInt(8, 16).rotl(2)); in TEST()
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