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Searched refs:rpll_pdiv (Results 1 – 2 of 2) sorted by relevance

/external/u-boot/arch/arm/mach-exynos/
Dclock_init.h78 unsigned rpll_pdiv; member
Dclock_init_exynos5.c181 .rpll_pdiv = 0x2,
804 writel(mem->rpll_pdiv * PLL_X_LOCK_FACTOR, &clk->rpll_lock); in exynos5420_system_clock_init()
906 val = set_pll(mem->rpll_mdiv, mem->rpll_pdiv, mem->rpll_sdiv); in exynos5420_system_clock_init()