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Searched refs:rsrc2 (Results 1 – 10 of 10) sorted by relevance

/external/mesa3d/src/gallium/drivers/radeonsi/
Dsi_compute.c73 uint32_t rsrc2 = code_object->compute_pgm_resource_registers >> 32; in code_object_to_config() local
78 out_config->lds_size = MAX2(out_config->lds_size, G_00B84C_LDS_SIZE(rsrc2)); in code_object_to_config()
79 out_config->rsrc2 = rsrc2; in code_object_to_config()
130 shader->config.rsrc2 = in si_create_compute_state_async()
410 config->rsrc2 &= C_00B84C_LDS_SIZE; in si_switch_compute_shader()
411 config->rsrc2 |= S_00B84C_LDS_SIZE(lds_blocks); in si_switch_compute_shader()
457 radeon_emit(cs, config->rsrc2); in si_switch_compute_shader()
460 "COMPUTE_PGM_RSRC2: 0x%08x\n", config->rsrc1, config->rsrc2); in si_switch_compute_shader()
Dsi_shader.h565 unsigned rsrc2; member
Dsi_state_draw.c260 unsigned hs_rsrc2 = ls_current->config.rsrc2 | in si_emit_derived_tess_state()
273 unsigned ls_rsrc2 = ls_current->config.rsrc2; in si_emit_derived_tess_state()
Dsi_state_shaders.c472 shader->config.rsrc2 = S_00B52C_USER_SGPR(SI_VS_NUM_USER_SGPR) | in si_shader_ls()
499 shader->config.rsrc2 = in si_shader_hs()
507 shader->config.rsrc2 = in si_shader_hs()
522 shader->config.rsrc2); in si_shader_hs()
Dsi_shader.c5183 conf->rsrc2 = value; in si_shader_binary_read_config()
/external/mesa3d/src/amd/vulkan/
Dradv_pipeline_cache.c37 uint32_t rsrc1, rsrc2; member
314 variant->rsrc2 = info.rsrc2; in radv_create_shader_variants_from_pipeline_cache()
394 info.rsrc2 = variants[i]->rsrc2; in radv_pipeline_cache_insert_shaders()
Dradv_shader.c380 variant->rsrc2 = S_00B12C_USER_SGPR(variant->info.num_user_sgprs) | in radv_fill_shader_variant()
391 variant->rsrc2 |= S_00B12C_OC_LDS_EN(1); in radv_fill_shader_variant()
397 variant->rsrc2 |= S_00B12C_OC_LDS_EN(1); in radv_fill_shader_variant()
407 variant->rsrc2 |= in radv_fill_shader_variant()
449 variant->rsrc2 |= S_00B22C_ES_VGPR_COMP_CNT(es_vgpr_comp_cnt) | in radv_fill_shader_variant()
Dradv_shader.h52 unsigned rsrc2; member
Dradv_cmd_buffer.c742 radeon_emit(cmd_buffer->cs, shader->rsrc2); in radv_emit_hw_vs()
770 radeon_emit(cmd_buffer->cs, shader->rsrc2); in radv_emit_hw_es()
778 uint32_t rsrc2 = shader->rsrc2; in radv_emit_hw_ls() local
784 rsrc2 |= S_00B52C_LDS_SIZE(cmd_buffer->state.pipeline->graphics.tess.lds_size); in radv_emit_hw_ls()
787 radeon_set_sh_reg(cmd_buffer->cs, R_00B52C_SPI_SHADER_PGM_RSRC2_LS, rsrc2); in radv_emit_hw_ls()
791 radeon_emit(cmd_buffer->cs, rsrc2); in radv_emit_hw_ls()
807 radeon_emit(cmd_buffer->cs, shader->rsrc2 | in radv_emit_hw_hs()
814 radeon_emit(cmd_buffer->cs, shader->rsrc2); in radv_emit_hw_hs()
955 radeon_emit(cmd_buffer->cs, gs->rsrc2 | in radv_emit_geometry_shader()
965 radeon_emit(cmd_buffer->cs, gs->rsrc2); in radv_emit_geometry_shader()
[all …]
/external/libxaac/decoder/
Dixheaacd_basic_ops.c81 WORD32 *rsrc2 = src2 + vlen - 1; in ixheaacd_windowing_long1() local
90 ixheaacd_mult32_sh1(*rsrc2, *win_fwd)); in ixheaacd_windowing_long1()
96 rsrc2--; in ixheaacd_windowing_long1()
108 ((ixheaacd_mult32_sh1(*rsrc2, *win_fwd)) >> (shift2 - shift1))); in ixheaacd_windowing_long1()
113 rsrc2--; in ixheaacd_windowing_long1()