| /external/tensorflow/tensorflow/python/ops/ragged/ |
| D | ragged_tensor_bounding_shape_op_test.py | 41 rt3 = ragged_tensor.RaggedTensor.from_row_splits(values, [0, 0, 7, 7])
44 self.assertRaggedEqual(rt3.bounding_shape(), [3, 7])
50 rt3 = ragged_tensor.RaggedTensor.from_row_splits(values, [0, 0, 7, 7])
53 self.assertRaggedEqual(rt3.bounding_shape(), [3, 7, 2])
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| D | ragged_range_op_test.py | 39 rt3 = ragged_math_ops.range([0, 5, 8], [3, 3, 12], 2)
40 self.assertRaggedEqual(rt3, [[0, 2], [], [8, 10]])
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| D | ragged_tensor_test.py | 135 rt3 = RaggedTensor.from_value_rowids(
139 for rt in (rt1, rt2, rt3, rt4, rt5):
141 del rt1, rt2, rt3, rt4, rt5
701 rt3 = RaggedTensor.from_row_splits(
703 self.assertEqual(rt3.shape.as_list(), [3, None, 2, 2])
705 rt4 = RaggedTensor.from_row_splits(rt3, [0, 1, 3, 3])
|
| /external/llvm/test/Verifier/ |
| D | recursive-type-2.ll | 4 %rt2 = type { i64, { i6, %rt3 } }
5 %rt3 = type { %rt1 }
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/Verifier/ |
| D | recursive-type-2.ll | 4 %rt2 = type { i64, { i6, %rt3 } }
5 %rt3 = type { %rt1 }
|
| /external/v8/src/arm64/ |
| D | simulator-arm64.cc | 4641 int rt3 = (rt2 + 1) % kNumberOfVRegisters; in NEONLoadStoreSingleStructHelper() local
4642 ld3r(vf, vreg(rt), vreg(rt2), vreg(rt3), addr); in NEONLoadStoreSingleStructHelper()
4651 int rt3 = (rt2 + 1) % kNumberOfVRegisters; in NEONLoadStoreSingleStructHelper() local
4652 int rt4 = (rt3 + 1) % kNumberOfVRegisters; in NEONLoadStoreSingleStructHelper()
4653 ld4r(vf, vreg(rt), vreg(rt2), vreg(rt3), vreg(rt4), addr); in NEONLoadStoreSingleStructHelper()
4672 int rt3 = (rt2 + 1) % kNumberOfVRegisters; in NEONLoadStoreSingleStructHelper() local
4673 int rt4 = (rt3 + 1) % kNumberOfVRegisters; in NEONLoadStoreSingleStructHelper()
4700 ld3(vf, vreg(rt), vreg(rt2), vreg(rt3), lane, addr); in NEONLoadStoreSingleStructHelper()
4703 LogVRead(addr + (2 * esize), rt3, print_format, lane); in NEONLoadStoreSingleStructHelper()
4705 st3(vf, vreg(rt), vreg(rt2), vreg(rt3), lane, addr); in NEONLoadStoreSingleStructHelper()
[all …]
|
| /external/vixl/src/aarch64/ |
| D | simulator-aarch64.cc | 5251 int rt3 = (rt2 + 1) % kNumberOfVRegisters; in NEONLoadStoreSingleStructHelper() local
5252 ld3r(vf, ReadVRegister(rt), ReadVRegister(rt2), ReadVRegister(rt3), addr); in NEONLoadStoreSingleStructHelper()
5261 int rt3 = (rt2 + 1) % kNumberOfVRegisters; in NEONLoadStoreSingleStructHelper() local
5262 int rt4 = (rt3 + 1) % kNumberOfVRegisters; in NEONLoadStoreSingleStructHelper()
5266 ReadVRegister(rt3), in NEONLoadStoreSingleStructHelper()
5287 int rt3 = (rt2 + 1) % kNumberOfVRegisters; in NEONLoadStoreSingleStructHelper() local
5288 int rt4 = (rt3 + 1) % kNumberOfVRegisters; in NEONLoadStoreSingleStructHelper()
5318 ReadVRegister(rt3), in NEONLoadStoreSingleStructHelper()
5323 LogVRead(addr + (2 * esize), rt3, print_format, lane); in NEONLoadStoreSingleStructHelper()
5328 ReadVRegister(rt3), in NEONLoadStoreSingleStructHelper()
[all …]
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| /external/hyphenation-patterns/ga/ |
| D | hyph-ga.pat.txt | 5058 rt3úc
|
| /external/hyphenation-patterns/de/ |
| D | hyph-de-1901.pat.txt | 17708 rt3äh
|
| D | hyph-de-ch-1901.pat.txt | 17600 rt3äh
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| D | hyph-de-1996.pat.txt | 17610 rt3äh
|