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/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/AArch64/
Dneon-scalar-extract-narrow.s23 sqxtn s19, d14
36 uqxtn s19, d14
Dbasic-a64-diagnostics.s1565 fccmp s19, s5, #-1, lt
1583 fccmpe s19, s5, #-1, lt
1637 fmaxnm d3, s19, d12
1676 fcvtzs wsp, s19, #14
1689 fcvtzs sp, s19, #14
1702 fcvtzu wsp, s19, #14
1715 fcvtzu sp, s19, #14
1728 scvtf wsp, s19, #14
1741 scvtf sp, s19, #14
1754 ucvtf wsp, s19, #14
[all …]
Dneon-scalar-reduce-pairwise.s15 faddp s19, v2.2s
Dneon-scalar-recip.s34 frecpe s19, s14
Dneon-scalar-shift-imm.s86 uqshl s14, s19, #18
/external/llvm/test/MC/AArch64/
Dneon-scalar-extract-narrow.s23 sqxtn s19, d14
36 uqxtn s19, d14
Dbasic-a64-diagnostics.s1560 fccmp s19, s5, #-1, lt
1578 fccmpe s19, s5, #-1, lt
1632 fmaxnm d3, s19, d12
1671 fcvtzs wsp, s19, #14
1684 fcvtzs sp, s19, #14
1697 fcvtzu wsp, s19, #14
1710 fcvtzu sp, s19, #14
1723 scvtf wsp, s19, #14
1736 scvtf sp, s19, #14
1749 ucvtf wsp, s19, #14
[all …]
Dneon-scalar-reduce-pairwise.s15 faddp s19, v2.2s
Dneon-scalar-recip.s34 frecpe s19, s14
Dneon-scalar-shift-imm.s86 uqshl s14, s19, #18
/external/capstone/suite/MC/AArch64/
Dneon-scalar-extract-narrow.s.cs7 0xd3,0x49,0xa1,0x5e = sqxtn s19, d14
10 0xd3,0x49,0xa1,0x7e = uqxtn s19, d14
Dneon-scalar-recip.s.cs6 0xd3,0xd9,0xa1,0x5e = frecpe s19, s14
Dneon-scalar-shift-imm.s.cs17 0x6e,0x76,0x32,0x7f = uqshl s14, s19, #18
/external/clang/test/CodeGen/
Darm-arguments.c110 struct s19 { int f0; struct s8 f1; }; argument
111 struct s19 f19(void) {} in f19()
Dx86_64-arguments.c108 struct s19 { struct
111 void f19(struct s19 x) {} in f19() argument
Darm64-arguments.c81 struct s19 { int f0; struct s8 f1; }; argument
82 struct s19 f19(void) {} in f19()
/external/boringssl/src/ssl/test/runner/ed25519/internal/edwards25519/
Dedwards25519.go1084 s19 := a8*b11 + a9*b10 + a10*b9 + a11*b8
1118 s19 += carry[18]
1154 carry[19] = (s19 + (1 << 20)) >> 21
1156 s19 -= carry[19] << 21
1193 s7 += s19 * 666643
1194 s8 += s19 * 470296
1195 s9 += s19 * 654183
1196 s10 -= s19 * 997805
1197 s11 += s19 * 136657
1198 s12 -= s19 * 683901
[all …]
/external/swiftshader/third_party/subzero/tests_lit/assembler/arm32/
Dvpush.ll31 ; ASM: vpush {s18, s19, s20, s21}
39 ; ASM: vpop {s18, s19, s20, s21}
/external/clang/test/Sema/
Dbitfield-layout_1.c185 } s19; variable
186 CHECK_SIZE(s19,12)
/external/boringssl/src/third_party/fiat/
Dcurve25519.c1085 int64_t s19 = 2097151 & (load_4(s + 49) >> 7); in x25519_sc_reduce() local
1140 s7 += s19 * 666643; in x25519_sc_reduce()
1141 s8 += s19 * 470296; in x25519_sc_reduce()
1142 s9 += s19 * 654183; in x25519_sc_reduce()
1143 s10 -= s19 * 997805; in x25519_sc_reduce()
1144 s11 += s19 * 136657; in x25519_sc_reduce()
1145 s12 -= s19 * 683901; in x25519_sc_reduce()
1146 s19 = 0; in x25519_sc_reduce()
1463 int64_t s19; in sc_muladd() local
1520 s19 = a8 * b11 + a9 * b10 + a10 * b9 + a11 * b8; in sc_muladd()
[all …]
/external/swiftshader/third_party/subzero/src/
DIceRegistersARM32.def56 X(Reg_s19, 19, "s19", 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 0, REGLIST3(RegARM32, s19, d9, q4)) \
81 X(Reg_d9, 9, "d9", 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 0, REGLIST4(RegARM32, d9, q4, s18, s19)) \
111 …q4, 4, "q4", 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, REGLIST7(RegARM32, q4, d8, d9, s16, s17, s18, s19)) \
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/AArch64/
Dspill-fold.ll63 …s8},~{s9},~{s10},~{s11},~{s12},~{s13},~{s14},~{s15},~{s16},~{s17},~{s18},~{s19},~{s20},~{s21},~{s2…
73 …s8},~{s9},~{s10},~{s11},~{s12},~{s13},~{s14},~{s15},~{s16},~{s17},~{s18},~{s19},~{s20},~{s21},~{s2…
Dremat-float0.ll15 …s8},~{s9},~{s10},~{s11},~{s12},~{s13},~{s14},~{s15},~{s16},~{s17},~{s18},~{s19},~{s20},~{s21},~{s2…
/external/llvm/test/CodeGen/AArch64/
Dremat-float0.ll15 …s8},~{s9},~{s10},~{s11},~{s12},~{s13},~{s14},~{s15},~{s16},~{s17},~{s18},~{s19},~{s20},~{s21},~{s2…
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/ARM/
Dfp-encoding.txt218 # CHECK: vstmiaeq r0, {s19, s20, s21, s22, s23}
220 # CHECK: vldmiaeq r3, {s18, s19, s20, s21, s22, s23}

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