| /external/clang/test/CodeGen/ |
| D | arm-arguments.c | 150 struct s29 { _Complex short f0; }; struct
151 struct s29 f29() {} in f29()
|
| D | arm64-arguments.c | 110 struct s29 { _Complex short f0; }; struct
111 struct s29 f29() {} in f29()
|
| D | x86_32-arguments-darwin.c | 127 struct s29 { struct { } a[1]; char b; char c; } f29(void) { while (1) {} } in f29() argument
|
| /external/llvm/test/MC/AArch64/ |
| D | arm64-crypto.s | 46 sha1c q23, s29, v3.4s
57 ; CHECK: sha1c.4s q23, s29, v3 ; encoding: [0xb7,0x03,0x03,0x5e]
|
| D | neon-scalar-abs.s | 18 fabd s29, s24, s20
|
| D | neon-scalar-by-elem-saturating-mla.s | 28 sqdmlsl s29, h28, v11.h[7]
|
| D | neon-scalar-by-elem-mla.s | 28 fmls s29, s10, v28.s[1]
|
| /external/swiftshader/third_party/subzero/src/ |
| D | IceRegistersARM32.def | 66 X(Reg_s29, 29, "s29", 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 0, REGLIST3(RegARM32, s29, d14, q7)) \
86 X(Reg_d14, 14, "d14", 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 0, REGLIST4(RegARM32, d14, q7, s28, s29)) \
114 …X(Reg_q7, 7, "q7", 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, REGLIST7(RegARM32, q7, d14, d15, s28, s29, s30…
|
| /external/capstone/suite/MC/AArch64/ |
| D | neon-scalar-abs.s.cs | 3 0x1d,0xd7,0xb4,0x7e = fabd s29, s24, s20
|
| D | neon-scalar-by-elem-mla.s.cs | 9 0x5d,0x51,0xbc,0x5f = fmls s29, s10, v28.s[1]
|
| D | neon-scalar-by-elem-saturating-mla.s.cs | 12 0x9d,0x7b,0x7b,0x5f = sqdmlsl s29, h28, v11.h[7]
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/AArch64/ |
| D | neon-scalar-abs.s | 18 fabd s29, s24, s20
|
| D | arm64-crypto.s | 47 sha1c q23, s29, v3.4s
58 ; CHECK: sha1c.4s q23, s29, v3 ; encoding: [0xb7,0x03,0x03,0x5e]
|
| D | neon-scalar-by-elem-mla.s | 28 fmls s29, s10, v28.s[1]
|
| D | neon-scalar-by-elem-saturating-mla.s | 28 sqdmlsl s29, h28, v11.h[7]
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/AArch64/ |
| D | spill-fold.ll | 63 …8},~{s19},~{s20},~{s21},~{s22},~{s23},~{s24},~{s25},~{s26},~{s27},~{s28},~{s29},~{s30},~{s31}"() n…
73 …8},~{s19},~{s20},~{s21},~{s22},~{s23},~{s24},~{s25},~{s26},~{s27},~{s28},~{s29},~{s30},~{s31}"() n…
|
| D | remat-float0.ll | 15 …{s18},~{s19},~{s20},~{s21},~{s22},~{s23},~{s24},~{s25},~{s26},~{s27},~{s28},~{s29},~{s30},~{s31}"()
|
| /external/llvm/test/CodeGen/AArch64/ |
| D | remat-float0.ll | 15 …{s18},~{s19},~{s20},~{s21},~{s22},~{s23},~{s24},~{s25},~{s26},~{s27},~{s28},~{s29},~{s30},~{s31}"()
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/AMDGPU/ |
| D | branch-relax-spill.ll | 39 %sgpr29 = tail call i32 asm sideeffect "s_mov_b32 s29, 0", "={s29}"() #0
158 tail call void asm sideeffect "; reg use $0", "{s29}"(i32 %sgpr29) #0
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/DebugInfo/MIR/ARM/ |
| D | split-superreg-piece.mir | 82 '$s29', '$s30', '$s31', '$d8_d10', '$d9_d11', '$d10_d12',
|
| D | split-superreg.mir | 82 '$s29', '$s30', '$s31', '$d8_d10', '$d9_d11', '$d10_d12',
|
| D | split-superreg-complex.mir | 82 '$s29', '$s30', '$s31', '$d8_d10', '$d9_d11', '$d10_d12',
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/Thumb/ |
| D | tbb-reuse.mir | 72 '$s28', '$s29', '$s30', '$s31', '$d8_d10', '$d9_d11',
|
| /external/v8/src/arm/ |
| D | simulator-arm.h | 75 s24, s25, s26, s27, s28, s29, s30, s31, enumerator
|
| /external/llvm/test/CodeGen/MIR/ARM/ |
| D | ARMLoadStoreDBG.mir | 97 '%s28', '%s29', '%s30', '%s31', '%d8_d10', '%d9_d11',
|