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Searched refs:s2fuser2clk (Results 1 – 2 of 2) sorted by relevance

/external/u-boot/arch/arm/mach-socfpga/
Dclock_manager_gen5.c227 writel(cfg->s2fuser2clk & CLKMGR_SDRPLLGRP_S2FUSER2CLK_CNT_MASK, in cm_basic_init()
228 &clock_manager_base->sdr_pll.s2fuser2clk); in cm_basic_init()
286 ret = cm_write_with_phase(cfg->s2fuser2clk, in cm_basic_init()
287 &clock_manager_base->sdr_pll.s2fuser2clk, in cm_basic_init()
/external/u-boot/arch/arm/mach-socfpga/include/mach/
Dclock_manager_gen5.h42 u32 s2fuser2clk; member
89 u32 s2fuser2clk; member