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Searched refs:s_and_b32 (Results 1 – 25 of 77) sorted by relevance

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/external/llvm/test/MC/AMDGPU/
Dtrap.s29 s_and_b32 ttmp10, ttmp8, 0x00000080 label
33 s_and_b32 ttmp9, tma_hi, 0x0000ffff label
37 s_and_b32 ttmp9, ttmp9, 0x000001ff label
41 s_and_b32 ttmp9, tma_lo, 0xffff0000 label
45 s_and_b32 ttmp9, ttmp9, ttmp8 label
49 s_and_b32 ttmp8, ttmp1, 0x01000000 label
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/AMDGPU/
Dtrap.s40 s_and_b32 ttmp10, ttmp8, 0x00000080 label
45 s_and_b32 ttmp9, tma_hi, 0x0000ffff label
50 s_and_b32 ttmp9, ttmp9, 0x000001ff label
55 s_and_b32 ttmp9, tma_lo, 0xffff0000 label
60 s_and_b32 ttmp9, ttmp9, ttmp8 label
65 s_and_b32 ttmp8, ttmp1, 0x01000000 label
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/AMDGPU/
Dand.ll11 ; SI: s_and_b32 s{{[0-9]+, s[0-9]+, s[0-9]+}}
12 ; SI: s_and_b32 s{{[0-9]+, s[0-9]+, s[0-9]+}}
30 ; SI: s_and_b32 s{{[0-9]+, s[0-9]+, s[0-9]+}}
31 ; SI: s_and_b32 s{{[0-9]+, s[0-9]+, s[0-9]+}}
32 ; SI: s_and_b32 s{{[0-9]+, s[0-9]+, s[0-9]+}}
33 ; SI: s_and_b32 s{{[0-9]+, s[0-9]+, s[0-9]+}}
45 ; SI: s_and_b32
53 ; SI: s_and_b32 s{{[0-9]+}}, s{{[0-9]+}}, 0x12d687
61 ; can fold into the s_and_b32 and the VALU one is materialized
67 ; SI-DAG: s_and_b32 [[AND:s[0-9]+]], s{{[0-9]+}}, [[K]]
[all …]
Dwiden-smrd-loads.ll18 ; GCN: s_and_b32 [[TRUNC:s[0-9]+]], [[VAL]], 0xffff{{$}}
77 ; SI: s_and_b32
108 ; GCN: s_and_b32 {{s[0-9]+}}, [[VAL]], 1{{$}}
118 ; GCN: s_and_b32 [[TRUNC:s[0-9]+]], [[VAL]], 0xffff{{$}}
132 ; GCN: s_and_b32 [[AND:s[0-9]+]], [[VAL]], 1
Dllvm.amdgcn.buffer.store.format.d16.ll19 ; UNPACKED-DAG: s_and_b32 [[MASKED:s[0-9]+]], [[S_DATA]], 0xffff{{$}}
36 ; UNPACKED-DAG: s_and_b32 [[MASKED0:s[0-9]+]], s[[S_DATA_0]], [[K]]
38 ; UNPACKED-DAG: s_and_b32 [[MASKED1:s[0-9]+]], s[[S_DATA_1]], [[K]]
Dfabs.f16.ll11 ; GCN: s_and_b32 [[RESULT:s[0-9]+]], [[VAL]], 0x7fff
23 ; GCN: s_and_b32 [[RESULT:s[0-9]+]], [[VAL]], 0x7fff
34 ; GCN: s_and_b32 s{{[0-9]+}}, [[VAL]], 0x7fff7fff
46 ; GCN-DAG: s_and_b32 s{{[0-9]+}}, s[[LO]], [[MASK]]
47 ; GCN-DAG: s_and_b32 s{{[0-9]+}}, s[[HI]], [[MASK]]
91 ; GCN: s_and_b32 s{{[0-9]+}}, [[VAL]], 0x7fff7fff
Dllvm.amdgcn.tbuffer.store.d16.ll19 ; UNPACKED-DAG: s_and_b32 [[MASKED:s[0-9]+]], [[S_DATA]], 0xffff{{$}}
36 ; UNPACKED-DAG: s_and_b32 [[MASKED0:s[0-9]+]], s[[S_DATA_0]], [[K]]
38 ; UNPACKED-DAG: s_and_b32 [[MASKED1:s[0-9]+]], s[[S_DATA_1]], [[K]]
Dtrunc-store-i1.ll7 ; GCN: s_and_b32 [[SREG:s[0-9]+]], [[LOAD]], 1
27 ; GCN: s_and_b32 [[SREG:s[0-9]+]], [[LOAD]], 1
Dshl.v2i16.ll15 ; VI: s_and_b32
16 ; VI: s_and_b32
20 ; VI: s_and_b32
26 ; CI: s_and_b32
31 ; CI: s_and_b32
Dbasic-branch.ll33 ; GCNNOOPT: s_and_b32 s{{[0-9]+}}, [[VAL]], [[ONE]]
34 ; GCNOPT: s_and_b32 s{{[0-9]+}}, [[VAL]], 1
Dinsert_vector_elt.v2i16.ll8 ; CIVI: s_and_b32 [[ELT1:s[0-9]+]], [[VEC]], 0xffff0000{{$}}
24 ; CIVI-DAG: s_and_b32 [[ELT0:s[0-9]+]], [[ELT_LOAD]], 0xffff{{$}}
25 ; CIVI-DAG: s_and_b32 [[ELT1:s[0-9]+]], [[VEC]], 0xffff0000{{$}}
42 ; CI-DAG: s_and_b32 [[ELT0_MASKED:s[0-9]+]], [[ELT_LOAD]], 0xffff{{$}}
50 ; VI-DAG: s_and_b32 [[ELT_MASKED:s[0-9]+]], [[ELT_LOAD]], 0xffff{{$}}
51 ; VI-DAG: s_and_b32 [[VEC_HIMASK:s[0-9]+]], [[VEC]], 0xffff0000{{$}}
76 ; CIVI-DAG: s_and_b32 [[ELT1:s[0-9]+]], [[VEC]], 0xffff0000{{$}}
96 ; CIVI-DAG: s_and_b32 [[ELT0:s[0-9]+]], [[VEC]], 0xffff0000{{$}}
125 ; VI: s_and_b32 [[MASK_HI:s[0-9]+]], [[VEC]], 0xffff0000
153 ; CIVI: s_and_b32 [[ELT0:s[0-9]+]], [[VEC]], 0xffff{{$}}
[all …]
Dfabs.ll14 ; GCN: s_and_b32 s{{[0-9]+}}, s{{[0-9]+}}, 0x7fffffff
26 ; GCN: s_and_b32 s{{[0-9]+}}, s{{[0-9]+}}, 0x7fffffff
37 ; GCN: s_and_b32 s{{[0-9]+}}, s{{[0-9]+}}, 0x7fffffff
Dstack-realign.ll33 ; GCN: s_and_b32 s5, s6, 0xfffffc00
54 ; GCN: s_and_b32 s5, s6, 0xfffff800
75 ; GCN: s_and_b32 s5, s6, 0xffffff00
Dmul_uint24-amdgcn.ll52 ; SI: s_and_b32
57 ; VI: s_and_b32
153 ; GCN-NOT: s_and_b32
166 ; GCN: s_and_b32
167 ; GCN: s_and_b32
Dzero_extend.ll55 ; GCN-DAG: s_and_b32 [[MASK_A:s[0-9]+]], [[A]], [[MASK]]
56 ; GCN-DAG: s_and_b32 [[MASK_B:s[0-9]+]], [[B]], [[MASK]]
Dtrunc.ll79 ; GCN: s_and_b32 s{{[0-9]+}}, s{{[0-9]+}}, 1
88 ; GCN: s_and_b32 s{{[0-9]+}}, s{{[0-9]+}}, 1
99 ; GCN: s_and_b32 [[MASKED:s[0-9]+]], 1, s[[SLO]]
Dfneg-fabs.f16.ll123 ; GFX9: s_and_b32 [[ABS:s[0-9]+]], s{{[0-9]+}}, 0x7fff7fff
134 ; GFX9: s_and_b32 [[ABS:s[0-9]+]], s{{[0-9]+}}, 0x7fff7fff
149 ; GFX9: s_and_b32 [[ABS:s[0-9]+]], s{{[0-9]+}}, 0x7fff7fff
Dumed3.ll367 ; GCN: s_and_b32
368 ; GCN: s_and_b32
369 ; GCN: s_and_b32
382 ; GCN: s_and_b32
383 ; GCN: s_and_b32
384 ; GCN: s_and_b32
/external/llvm/test/CodeGen/AMDGPU/
Dand.ll44 ; SI: s_and_b32
52 ; SI: s_and_b32 s{{[0-9]+}}, s{{[0-9]+}}, 0x12d687
60 ; can fold into the s_and_b32 and the VALU one is materialized
66 ; SI-DAG: s_and_b32 [[AND:s[0-9]+]], s{{[0-9]+}}, [[K]]
82 ; SI: s_and_b32 [[AND:s[0-9]+]], s{{[0-9]+}}, [[K]]
181 ; SI-DAG: s_and_b32 s{{[0-9]+}}, s{{[0-9]+}}, 0x80000{{$}}
182 ; SI-DAG: s_and_b32 s{{[0-9]+}}, s{{[0-9]+}}, 0x80{{$}}
205 ; SI: s_and_b32 s{{[0-9]+}}, s{{[0-9]+}}, 0x12d687{{$}}
222 ; SI: s_and_b32 s{{[0-9]+}}, [[A]], 62
223 ; SI: s_and_b32 s{{[0-9]+}}, [[B]], 62
[all …]
Dtrunc-store-i1.ll7 ; SI: s_and_b32 [[SREG:s[0-9]+]], [[LOAD]], 1
26 ; SI: s_and_b32 [[SREG:s[0-9]+]], [[LOAD]], 1
Dtrunc.ll64 ; SI: s_and_b32 s{{[0-9]+}}, 1, s{{[0-9]+}}
75 ; SI: s_and_b32 [[MASKED:s[0-9]+]], 1, s[[SLO]]
Dumed3.ll365 ; GCN: s_and_b32
366 ; GCN: s_and_b32
367 ; GCN: s_and_b32
380 ; GCN: s_and_b32
381 ; GCN: s_and_b32
382 ; GCN: s_and_b32
/external/llvm/test/MC/Disassembler/AMDGPU/
Dtrap_vi.txt22 # VI: s_and_b32 ttmp10, ttmp8, 0x80 ; encoding: [0x78,0xff,0x7a,0x86,0x80,0x00,0x00,0x00]
25 # VI: s_and_b32 ttmp9, tma_hi, 0xffff ; encoding: [0x6f,0xff,0x79,0x86,0xff,0xff,0x00,0x00]
28 # VI: s_and_b32 ttmp9, ttmp9, 0x1ff ; encoding: [0x79,0xff,0x79,0x86,0xff,0x01,0x00,0x00]
31 # VI: s_and_b32 ttmp9, tma_lo, 0xffff0000 ; encoding: [0x6e,0xff,0x79,0x86,0x00,0x00,0xff,0xff]
34 # VI: s_and_b32 ttmp9, ttmp9, ttmp8 ; encoding: [0x79,0x78,0x79,0x86]
37 # VI: s_and_b32 ttmp8, ttmp1, 0x1000000 ; encoding: [0x71,0xff,0x78,0x86,0x00,0x00,0x00,0x01]
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/AMDGPU/
Dtrap_vi.txt22 # VI: s_and_b32 ttmp10, ttmp8, 0x80 ; encoding: [0x78,0xff,0x7a,0x86,0x80,0x00,0x00,0x00]
25 # VI: s_and_b32 ttmp9, tma_hi, 0xffff ; encoding: [0x6f,0xff,0x79,0x86,0xff,0xff,0x00,0x00]
28 # VI: s_and_b32 ttmp9, ttmp9, 0x1ff ; encoding: [0x79,0xff,0x79,0x86,0xff,0x01,0x00,0x00]
31 # VI: s_and_b32 ttmp9, tma_lo, 0xffff0000 ; encoding: [0x6e,0xff,0x79,0x86,0x00,0x00,0xff,0xff]
34 # VI: s_and_b32 ttmp9, ttmp9, ttmp8 ; encoding: [0x79,0x78,0x79,0x86]
37 # VI: s_and_b32 ttmp8, ttmp1, 0x1000000 ; encoding: [0x71,0xff,0x78,0x86,0x00,0x00,0x00,0x01]
Dtrap_gfx9.txt22 # GFX9: s_and_b32 ttmp10, ttmp8, 0x80 ; encoding: [0x74,0xff,0x76,0x86,0x80,0x00,0x00,0x00]
25 # GFX9: s_and_b32 ttmp9, ttmp9, 0x1ff ; encoding: [0x75,0xff,0x75,0x86,0xff,0x01,0x00,0x00]
28 # GFX9: s_and_b32 ttmp9, ttmp9, ttmp8 ; encoding: [0x75,0x74,0x75,0x86]
31 # GFX9: s_and_b32 ttmp8, ttmp1, 0x1000000 ; encoding: [0x6d,0xff,0x74,0x86,0x00,0x00,0x00,0x01]

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