| /external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/AMDGPU/ |
| D | loop_exit_with_xor.ll | 12 ; GCN: s_andn2_b64 exec, exec, [[REG3]]
42 ; GCN: s_andn2_b64 exec, exec, [[REG2]]
66 ; GCN: s_andn2_b64 exec, exec, [[REG3]]
|
| D | si-annotate-cfg-loop-assert.ll | 7 ; CHECK s_andn2_b64 exec, exec
|
| D | multilevel-break.ll | 36 ; GCN-NEXT: s_andn2_b64 exec, exec, [[OR_BREAK]]
46 ; GCN-NEXT: s_andn2_b64 exec, exec, [[OUTER_OR_BREAK]]
|
| D | si-annotate-cf.ll | 10 ; SI: s_andn2_b64
39 ; SI: s_andn2_b64 exec, exec, [[BREAK]]
|
| D | infinite-loop.ll | 138 ; SI: s_andn2_b64 exec
141 ; SI: s_andn2_b64 exec
|
| D | collapse-endcf.ll | 209 ; GCN: s_andn2_b64 exec, exec,
218 ; GCN: s_andn2_b64
|
| D | llvm.amdgcn.kill.ll | 67 ; SI: s_andn2_b64 exec, exec, s[0:1]
|
| D | valu-i1.ll | 229 ; SI-NEXT: s_andn2_b64 exec, exec, [[COND_STATE]]
|
| D | loop_break.ll | 41 ; GCN: s_andn2_b64 exec, exec, [[MASK]]
|
| /external/llvm/test/CodeGen/AMDGPU/ |
| D | si-annotate-cfg-loop-assert.ll | 7 ; CHECK s_andn2_b64 exec, exec
|
| D | si-annotate-cf.ll | 10 ; SI: s_andn2_b64
39 ; SI: s_andn2_b64 exec, exec, [[BREAK]]
|
| D | valu-i1.ll | 144 ; SI: s_andn2_b64 exec, exec, [[COND_STATE]]
|
| /external/llvm/test/MC/AMDGPU/ |
| D | sop2.s | 71 s_andn2_b64 s[2:3], s[4:5], s[6:7] label
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/AMDGPU/ |
| D | sop2.s | 77 s_andn2_b64 s[2:3], s[4:5], s[6:7] label
|
| D | gfx7_asm_all.s | 17034 s_andn2_b64 s[10:11], s[2:3], s[4:5] label
17037 s_andn2_b64 s[12:13], s[2:3], s[4:5] label
17040 s_andn2_b64 s[102:103], s[2:3], s[4:5] label
17043 s_andn2_b64 flat_scratch, s[2:3], s[4:5] label
17046 s_andn2_b64 vcc, s[2:3], s[4:5] label
17049 s_andn2_b64 tba, s[2:3], s[4:5] label
17052 s_andn2_b64 tma, s[2:3], s[4:5] label
17055 s_andn2_b64 ttmp[10:11], s[2:3], s[4:5] label
17058 s_andn2_b64 exec, s[2:3], s[4:5] label
17061 s_andn2_b64 s[10:11], s[4:5], s[4:5] label
[all …]
|
| D | gfx8_asm_all.s | 17706 s_andn2_b64 s[10:11], s[2:3], s[4:5] label
17709 s_andn2_b64 s[12:13], s[2:3], s[4:5] label
17712 s_andn2_b64 s[100:101], s[2:3], s[4:5] label
17715 s_andn2_b64 flat_scratch, s[2:3], s[4:5] label
17718 s_andn2_b64 vcc, s[2:3], s[4:5] label
17721 s_andn2_b64 tba, s[2:3], s[4:5] label
17724 s_andn2_b64 tma, s[2:3], s[4:5] label
17727 s_andn2_b64 ttmp[10:11], s[2:3], s[4:5] label
17730 s_andn2_b64 exec, s[2:3], s[4:5] label
17733 s_andn2_b64 s[10:11], s[4:5], s[4:5] label
[all …]
|
| D | gfx9_asm_all.s | 16222 s_andn2_b64 s[10:11], s[2:3], s[4:5] label
16225 s_andn2_b64 s[12:13], s[2:3], s[4:5] label
16228 s_andn2_b64 s[100:101], s[2:3], s[4:5] label
16231 s_andn2_b64 flat_scratch, s[2:3], s[4:5] label
16234 s_andn2_b64 vcc, s[2:3], s[4:5] label
16237 s_andn2_b64 exec, s[2:3], s[4:5] label
16240 s_andn2_b64 s[10:11], s[4:5], s[4:5] label
16243 s_andn2_b64 s[10:11], s[100:101], s[4:5] label
16246 s_andn2_b64 s[10:11], flat_scratch, s[4:5] label
16249 s_andn2_b64 s[10:11], vcc, s[4:5] label
[all …]
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/AMDGPU/ |
| D | sop2_vi.txt | 24 # VI: s_andn2_b64 s[2:3], s[4:5], s[6:7] ; encoding: [0x04,0x06,0x82,0x89]
|
| D | gfx8_dasm_all.txt | 14442 # CHECK: s_andn2_b64 s[10:11], s[2:3], s[4:5] ; encoding: [0x02,0x04,0x8a,0x89]
14445 # CHECK: s_andn2_b64 s[12:13], s[2:3], s[4:5] ; encoding: [0x02,0x04,0x8c,0x89]
14448 # CHECK: s_andn2_b64 s[100:101], s[2:3], s[4:5] ; encoding: [0x02,0x04,0xe4,0x89]
14451 # CHECK: s_andn2_b64 flat_scratch, s[2:3], s[4:5] ; encoding: [0x02,0x04,0xe6,0x89]
14454 # CHECK: s_andn2_b64 vcc, s[2:3], s[4:5] ; encoding: [0x02,0x04,0xea,0x89]
14457 # CHECK: s_andn2_b64 tba, s[2:3], s[4:5] ; encoding: [0x02,0x04,0xec,0x89]
14460 # CHECK: s_andn2_b64 tma, s[2:3], s[4:5] ; encoding: [0x02,0x04,0xee,0x89]
14463 # CHECK: s_andn2_b64 ttmp[10:11], s[2:3], s[4:5] ; encoding: [0x02,0x04,0xfa,0x89]
14466 # CHECK: s_andn2_b64 exec, s[2:3], s[4:5] ; encoding: [0x02,0x04,0xfe,0x89]
14469 # CHECK: s_andn2_b64 s[10:11], s[4:5], s[4:5] ; encoding: [0x04,0x04,0x8a,0x89]
[all …]
|
| /external/llvm/test/MC/Disassembler/AMDGPU/ |
| D | sop2_vi.txt | 24 # VI: s_andn2_b64 s[2:3], s[4:5], s[6:7] ; encoding: [0x04,0x06,0x82,0x89]
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/ |
| D | SOPInstructions.td | 421 def S_ANDN2_B64 : SOP2_64 <"s_andn2_b64">;
|
| /external/swiftshader/third_party/llvm-7.0/llvm/docs/ |
| D | AMDGPUAsmGFX7.rst | 431 s_andn2_b64 dst, src0, src1
|
| D | AMDGPUAsmGFX8.rst | 449 s_andn2_b64 dst, src0, src1
|
| D | AMDGPUAsmGFX9.rst | 592 s_andn2_b64 dst, src0, src1
|
| /external/llvm/lib/Target/AMDGPU/ |
| D | SIInstructions.td | 263 defm S_ANDN2_B64 : SOP2_64 <sop2<0x15, 0x13>, "s_andn2_b64", []>;
|